OpenCores
URL https://opencores.org/ocsvn/darkriscv/darkriscv/trunk

Subversion Repositories darkriscv

[/] [darkriscv/] [trunk/] [src/] [boot.s] - Blame information for rev 4

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 4 marcelos
/*
2
 * Copyright (c) 2018, Marcelo Samsoniuk
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions are met:
7
 *
8
 * * Redistributions of source code must retain the above copyright notice, this
9
 *   list of conditions and the following disclaimer.
10
 *
11
 * * Redistributions in binary form must reproduce the above copyright notice,
12
 *   this list of conditions and the following disclaimer in the documentation
13
 *   and/or other materials provided with the distribution.
14
 *
15
 * * Neither the name of the copyright holder nor the names of its
16
 *   contributors may be used to endorse or promote products derived from
17
 *   this software without specific prior written permission.
18
 *
19
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
23
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26
 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27
 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
 */
30
 
31 2 marcelos
        .option nopic
32
        .text
33 4 marcelos
        .section .boot
34 2 marcelos
        .align  2
35 4 marcelos
        .globl  check4rv32i
36
 
37
/*
38
        boot:
39
        - read and increent thread counter
40
        - case not zero, jump to multi thread boot
41
        - otherwise continue
42
*/
43
 
44
_boot:
45
 
46
        la      a0,threads
47
        lw      a1,0(a0)
48
        addi    a2,a1,1
49
        sw      a2,0(a0)
50
        la      a3,io
51
        bne     a1,x0,_multi_thread_boot
52
 
53
/*
54
        normal boot here:
55
        - set stack
56
        - set global pointer
57
        - plot boot banner
58
        - print memory setup
59
        - call main
60
        - repeat forever
61
*/
62
 
63
_normal_boot:
64
 
65
        la      sp,_stack
66
        la      gp,_global
67
 
68
        call    banner
69
 
70
        la      a3,_stack
71
        la      a2,_heap
72
        sub     a4,a3,a2
73
        la      a1,_boot
74
        la      a0,_boot0msg
75 2 marcelos
        call    printf
76 4 marcelos
 
77 2 marcelos
        call    main
78 4 marcelos
 
79
        j       _normal_boot
80
 
81
/*
82
        multi-thread boot:
83
        - set io base
84
        - write thread number to io.gpio
85
        - increent thread number
86
        - repeat forever
87
*/
88
 
89
_multi_thread_boot:
90
 
91
        sh      a1,10(a3)
92
        addi    a1,a1,1
93
        j       _multi_thread_boot
94
 
95
/*
96
        rv32e/rv32i detection:
97
        - set x15 0
98
        - set x31 1
99
        - sub x31-x15 and return the value
100
        why this works?!
101
        - the rv32i have separate x15 and x31, but the rv32e will make x15 = x31
102
        - this "feature" probably works only in the darkriscv! :)
103
*/
104
 
105
check4rv32i:
106
 
107
        .word   0x00000793      /* addi    x15,x0,0   */
108
        .word   0x00100f93      /* addi    x31,x0,1   */
109
        .word   0x40ff8533      /* sub     a0,x31,x15 */
110
 
111
        ret
112
 
113
/*
114
        data segment here!
115
*/
116
 
117
        .section .rodata
118 2 marcelos
        .align  2
119 4 marcelos
 
120
_boot0msg:
121
        .string "boot0: text@%d data@%d stack@%d (%d bytes free)\n"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.