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[/] [ddr3_synthesizable_bfm/] [trunk/] [rtl/] [ddr3_sr36.v] - Blame information for rev 2

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1 2 slai
/*
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Multibits Shift Register
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2010-2011 sclai <laikos@yahoo.com>
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This library is free software; you can redistribute it and/or modify it
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 under the terms of the GNU Lesser General Public License as published by
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 the Free Software Foundation; either version 2.1 of the License,
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 or (at your option) any later version.
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 This library is distributed in the hope that it will be useful, but
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 WITHOUT ANY WARRANTY; without even the implied warranty of
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 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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 Lesser General Public License for more details.
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 You should have received a copy of the GNU Lesser General Public
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 License along with this library; if not, write to the Free Software
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 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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 USA
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*/
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module ddr3_sr36 #(
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parameter PIPE_LEN=7
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)(
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input wire        clk,
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input wire [35:0] shift_in,
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output wire [35:0]shift_out
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);
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//register to hold value
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reg [PIPE_LEN-1:0] d0;
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reg [PIPE_LEN-1:0] d1;
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reg [PIPE_LEN-1:0] d2;
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reg [PIPE_LEN-1:0] d3;
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reg [PIPE_LEN-1:0] d4;
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reg [PIPE_LEN-1:0] d5;
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reg [PIPE_LEN-1:0] d6;
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reg [PIPE_LEN-1:0] d7;
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reg [PIPE_LEN-1:0] d8;
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reg [PIPE_LEN-1:0] d9;
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reg [PIPE_LEN-1:0] d10;
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reg [PIPE_LEN-1:0] d11;
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reg [PIPE_LEN-1:0] d12;
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reg [PIPE_LEN-1:0] d13;
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reg [PIPE_LEN-1:0] d14;
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reg [PIPE_LEN-1:0] d15;
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reg [PIPE_LEN-1:0] d16;
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reg [PIPE_LEN-1:0] d17;
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reg [PIPE_LEN-1:0] d18;
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reg [PIPE_LEN-1:0] d19;
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reg [PIPE_LEN-1:0] d20;
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reg [PIPE_LEN-1:0] d21;
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reg [PIPE_LEN-1:0] d22;
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reg [PIPE_LEN-1:0] d23;
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reg [PIPE_LEN-1:0] d24;
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reg [PIPE_LEN-1:0] d25;
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reg [PIPE_LEN-1:0] d26;
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reg [PIPE_LEN-1:0] d27;
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reg [PIPE_LEN-1:0] d28;
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reg [PIPE_LEN-1:0] d29;
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reg [PIPE_LEN-1:0] d30;
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reg [PIPE_LEN-1:0] d31;
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reg [PIPE_LEN-1:0] d32;
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reg [PIPE_LEN-1:0] d33;
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reg [PIPE_LEN-1:0] d34;
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reg [PIPE_LEN-1:0] d35;
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always @(posedge clk)
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begin
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  d35 <={shift_in[35],d35[PIPE_LEN-1:1]};
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  d34 <={shift_in[34],d34[PIPE_LEN-1:1]};
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  d33 <={shift_in[33],d33[PIPE_LEN-1:1]};
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  d32 <={shift_in[32],d32[PIPE_LEN-1:1]};
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  d31 <={shift_in[31],d31[PIPE_LEN-1:1]};
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  d30 <={shift_in[30],d30[PIPE_LEN-1:1]};
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  d29 <={shift_in[29],d29[PIPE_LEN-1:1]};
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  d28 <={shift_in[28],d28[PIPE_LEN-1:1]};
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  d27 <={shift_in[27],d27[PIPE_LEN-1:1]};
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  d26 <={shift_in[26],d26[PIPE_LEN-1:1]};
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  d25 <={shift_in[25],d25[PIPE_LEN-1:1]};
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  d24 <={shift_in[24],d24[PIPE_LEN-1:1]};
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  d23 <={shift_in[23],d23[PIPE_LEN-1:1]};
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  d22 <={shift_in[22],d22[PIPE_LEN-1:1]};
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  d21 <={shift_in[21],d21[PIPE_LEN-1:1]};
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  d20 <={shift_in[20],d20[PIPE_LEN-1:1]};
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  d19 <={shift_in[19],d19[PIPE_LEN-1:1]};
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  d18 <={shift_in[18],d18[PIPE_LEN-1:1]};
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  d17 <={shift_in[17],d17[PIPE_LEN-1:1]};
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  d16 <={shift_in[16],d16[PIPE_LEN-1:1]};
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  d15 <={shift_in[15],d15[PIPE_LEN-1:1]};
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  d14 <={shift_in[14],d14[PIPE_LEN-1:1]};
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  d13 <={shift_in[13],d13[PIPE_LEN-1:1]};
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  d12 <={shift_in[12],d12[PIPE_LEN-1:1]};
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  d11 <={shift_in[11],d11[PIPE_LEN-1:1]};
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  d10 <={shift_in[10],d10[PIPE_LEN-1:1]};
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  d9  <={shift_in[ 9], d9[PIPE_LEN-1:1]};
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  d8  <={shift_in[ 8], d8[PIPE_LEN-1:1]};
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  d7  <={shift_in[ 7], d7[PIPE_LEN-1:1]};
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  d6  <={shift_in[ 6], d6[PIPE_LEN-1:1]};
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  d5  <={shift_in[ 5], d5[PIPE_LEN-1:1]};
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  d4  <={shift_in[ 4], d4[PIPE_LEN-1:1]};
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  d3  <={shift_in[ 3], d3[PIPE_LEN-1:1]};
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  d2  <={shift_in[ 2], d2[PIPE_LEN-1:1]};
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  d1  <={shift_in[ 1], d1[PIPE_LEN-1:1]};
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  d0  <={shift_in[ 0], d0[PIPE_LEN-1:1]};
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end
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assign shift_out={d35[0],d34[0],d33[0],d32[0],
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d31[0],d30[0],d29[0],d28[0],d27[0],d26[0],d25[0],d24[0],
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d23[0],d22[0],d21[0],d20[0],d19[0],d18[0],d17[0],d16[0],
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d15[0],d14[0],d13[0],d12[0],d11[0],d10[0],d9[0],d8[0],
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d7[0],d6[0],d5[0],d4[0],d3[0],d2[0],d1[0],d0[0]
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};
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endmodule
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