URL https://opencores.org/ocsvn/dma_axi/dma_axi/trunk

Subversion Repositories dma_axi

[/] [dma_axi/] [trunk/] [src/] [dma_axi32/] [prgen_min2.v] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	eyalhoc	`//---------------------------------------------------------`
2			`//-- File generated by RobustVerilog parser`
3			`//-- Version: 1.0`
4			`//-- Invoked Fri Mar 25 23:34:53 2011`
5			`//--`
6			`//-- Source file: prgen_min2.v`
7			`//---------------------------------------------------------`
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11			`module prgen_min2(a,b,min);`
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13			`parameter WIDTH = 8;`
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15			`input [WIDTH-1:0] a;`
16			`input [WIDTH-1:0] b;`
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18			`output [WIDTH-1:0] min;`
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21			`assign min = a < b ? a : b;`
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23			`endmodule`
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