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[/] [dma_axi/] [trunk/] [src/] [dma_axi32/] [prgen_scatter8_1.v] - Blame information for rev 2

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1 2 eyalhoc
//---------------------------------------------------------
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//-- File generated by RobustVerilog parser
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//-- Version: 1.0
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//-- Invoked Fri Mar 25 23:34:50 2011
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//--
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//-- Source file: prgen_scatter.v
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//---------------------------------------------------------
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module prgen_scatter8_1(ch_x,x);
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   parameter                  CH_NUM     = 0;
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   input [8*1-1:0]    ch_x;
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   output [8-1:0]         x;
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   assign               x = {
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                  ch_x[CH_NUM+7],
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                  ch_x[CH_NUM+6],
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                  ch_x[CH_NUM+5],
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                  ch_x[CH_NUM+4],
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                  ch_x[CH_NUM+3],
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                  ch_x[CH_NUM+2],
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                  ch_x[CH_NUM+1],
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                  ch_x[CH_NUM+0]};
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endmodule
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