OpenCores
URL https://opencores.org/ocsvn/dp_pkg/dp_pkg/trunk

Subversion Repositories dp_pkg

[/] [dp_pkg/] [trunk/] [dp_stream_stimuli.vhd] - Blame information for rev 5

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 danv
-------------------------------------------------------------------------------
2
--
3
-- Copyright (C) 2015
4
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
5
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
6
--
7
-- This program is free software: you can redistribute it and/or modify
8
-- it under the terms of the GNU General Public License as published by
9
-- the Free Software Foundation, either version 3 of the License, or
10
-- (at your option) any later version.
11
--
12
-- This program is distributed in the hope that it will be useful,
13
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
14
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
-- GNU General Public License for more details.
16
--
17
-- You should have received a copy of the GNU General Public License
18
-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
19
--
20
-------------------------------------------------------------------------------
21
 
22
-- Purpose:
23
-- . The dp_stream_stimuli generates as stream of packets with counter data.
24
-- Description:
25
--
26
-- Remark:
27
-- . The stimuli empty = 0 because the data in proc_dp_gen_block_data() is
28
--   generated with one symbol per data (because symbol_w = data_w).
29
--
30
-- Usage:
31
-- . See tb_dp_example_no_dut for usage example
32
--
33
 
34
LIBRARY IEEE, common_pkg_lib;
35
USE IEEE.std_logic_1164.ALL;
36
USE IEEE.numeric_std.ALL;
37
USE common_pkg_lib.common_pkg.ALL;
38
USE common_pkg_lib.common_lfsr_sequences_pkg.ALL;
39
USE common_pkg_lib.tb_common_pkg.ALL;
40
USE work.dp_stream_pkg.ALL;
41
USE work.tb_dp_pkg.ALL;
42
 
43
 
44
ENTITY dp_stream_stimuli IS
45
  GENERIC (
46
    g_instance_nr    : NATURAL := 0;
47
    -- flow control
48
    g_random_w       : NATURAL := 15;                       -- use different random width for stimuli and for verify to have different random sequences
49
    g_pulse_active   : NATURAL := 1;
50
    g_pulse_period   : NATURAL := 2;
51
    g_flow_control   : t_dp_flow_control_enum := e_active;  -- always active, random or pulse flow control
52
    -- initializations
53
    g_sync_period    : NATURAL := 10;
54
    g_sync_offset    : NATURAL := 0;
55
    g_data_init      : NATURAL := 0;    -- choose some easy to recognize and unique value, data will increment at every valid
56
    g_bsn_init       : STD_LOGIC_VECTOR(c_dp_stream_bsn_w-1 DOWNTO 0) := TO_DP_BSN(0);  -- X"0877665544332211", bsn will increment at every sop
57
    g_err_init       : NATURAL := 247;  -- choose some easy to recognize and unique value
58
    g_err_incr       : NATURAL := 1;    -- when 0 keep fixed at init value, when 1 increment at every sop
59
    g_channel_init   : NATURAL := 5;    -- choose some easy to recognize and unique value
60
    g_channel_incr   : NATURAL := 1;    -- when 0 keep fixed at init value, when 1 increment at every sop
61
    -- specific
62
    g_in_dat_w       : NATURAL := 32;
63
    g_nof_repeat     : NATURAL := 5;
64
    g_pkt_len        : NATURAL := 16;
65 5 danv
    g_pkt_gap        : NATURAL := 4;
66
    g_wait_last_evt  : NATURAL := 100   -- number of clk cycles to wait with last_snk_in_evt after finishing the stimuli
67 2 danv
  );
68
  PORT (
69
    rst               : IN  STD_LOGIC;
70
    clk               : IN  STD_LOGIC;
71
 
72
    -- Generate stimuli
73
    src_in            : IN  t_dp_siso := c_dp_siso_rdy;
74
    src_out           : OUT t_dp_sosi;
75
 
76
    -- End of stimuli
77
    last_snk_in       : OUT t_dp_sosi;   -- expected verify_snk_in after end of stimuli 
78
    last_snk_in_evt   : OUT STD_LOGIC;   -- trigger verify to verify the last_snk_in 
79
    tb_end            : OUT STD_LOGIC    -- signal end of tb as far as this dp_stream_stimuli is concerned
80
  );
81
END dp_stream_stimuli;
82
 
83
 
84
ARCHITECTURE str OF dp_stream_stimuli IS
85
 
86
  SIGNAL random          : STD_LOGIC_VECTOR(g_random_w-1 DOWNTO 0) := TO_UVEC(g_instance_nr, g_random_w);  -- use different initialization to have different random sequences per stream
87
  SIGNAL pulse           : STD_LOGIC;
88
  SIGNAL pulse_en        : STD_LOGIC := '1';
89
 
90
  SIGNAL stimuli_en      : STD_LOGIC := '1';
91
  SIGNAL src_out_data    : STD_LOGIC_VECTOR(g_in_dat_w-1 DOWNTO 0);
92
  SIGNAL i_src_out       : t_dp_sosi;
93
 
94
BEGIN
95
 
96
  src_out <= i_src_out;
97
 
98
  ------------------------------------------------------------------------------
99
  -- STREAM CONTROL
100
  ------------------------------------------------------------------------------
101
 
102
  random <= func_common_random(random) WHEN rising_edge(clk);
103
 
104
  proc_common_gen_duty_pulse(g_pulse_active, g_pulse_period, '1', rst, clk, pulse_en, pulse);
105
 
106
  stimuli_en <= '1'                 WHEN g_flow_control=e_active ELSE
107
                random(random'HIGH) WHEN g_flow_control=e_random ELSE
108
                pulse               WHEN g_flow_control=e_pulse;
109
 
110
  ------------------------------------------------------------------------------
111
  -- DATA GENERATION
112
  ------------------------------------------------------------------------------
113
 
114
  -- Generate data path input data
115
  p_stimuli_st : PROCESS
116
    VARIABLE v_sosi : t_dp_sosi := c_dp_sosi_rst;
117
    VARIABLE v_last : t_dp_sosi := c_dp_sosi_rst;
118
  BEGIN
119
    -- Initialisations
120
    last_snk_in <= c_dp_sosi_rst;
121
    last_snk_in_evt <= '0';
122
    tb_end <= '0';
123
 
124
    -- Adjust initial sosi field values by -1 to compensate for auto increment
125
    v_sosi.bsn     := INCR_UVEC(g_bsn_init,                    -1);
126
    v_sosi.channel := INCR_UVEC(TO_DP_CHANNEL(g_channel_init), -g_channel_incr);
127
    v_sosi.data    := INCR_UVEC(TO_DP_DATA(g_data_init),       -g_pkt_len);
128
    v_sosi.err     := INCR_UVEC(TO_DP_ERROR(g_err_init),       -g_err_incr);
129
 
130
    i_src_out <= c_dp_sosi_rst;
131
    proc_common_wait_until_low(clk, rst);
132
    proc_common_wait_some_cycles(clk, 5);
133
 
134
    -- Generate g_nof_repeat packets
135
    FOR I IN 0 TO g_nof_repeat-1 LOOP
136
      -- Auto increment v_sosi field values for this packet
137
      v_sosi.bsn     := INCR_UVEC(v_sosi.bsn, 1);
138
      v_sosi.sync    := sel_a_b((UNSIGNED(v_sosi.bsn) MOD g_sync_period) = g_sync_offset, '1', '0');  -- insert sync starting at BSN=g_sync_offset and with period g_sync_period
139
      v_sosi.channel := INCR_UVEC(v_sosi.channel, g_channel_incr);
140
      v_sosi.data    := INCR_UVEC(v_sosi.data, g_pkt_len);
141
      v_sosi.data    := RESIZE_DP_DATA(v_sosi.data(g_in_dat_w-1 DOWNTO 0));  -- wrap when >= 2**g_in_dat_w
142
      v_sosi.err     := INCR_UVEC(v_sosi.err, g_err_incr);
143
 
144
      -- Send packet
145
      proc_dp_gen_block_data(g_in_dat_w, TO_UINT(v_sosi.data), g_pkt_len, TO_UINT(v_sosi.channel), TO_UINT(v_sosi.err), v_sosi.sync, v_sosi.bsn, clk, stimuli_en, src_in, i_src_out);
146
 
147
      -- Insert optional gap between the packets
148
      proc_common_wait_some_cycles(clk, g_pkt_gap);
149
 
150
      -- Update v_last.sync
151
      IF v_sosi.sync='1' THEN v_last.sync := '1'; END IF;
152
    END LOOP;
153
 
154
    -- Update v_last control
155
    IF g_nof_repeat>0 THEN
156
      v_last.sop := '1';
157
      v_last.eop := '1';
158
      v_last.valid := '1';
159
    END IF;
160
 
161
    -- Determine and keep last expected sosi field values after end of stimuli
162
    -- . e_qual
163
    v_last.bsn     := STD_LOGIC_VECTOR( UNSIGNED(g_bsn_init) + g_nof_repeat-1);
164
    v_last.channel := TO_DP_CHANNEL(g_channel_init           + (g_nof_repeat-1)*g_channel_incr);
165
    v_last.err     := TO_DP_ERROR(g_err_init                 + (g_nof_repeat-1)*g_err_incr);
166
    -- . account for g_pkt_len
167
    v_last.data    := INCR_UVEC(v_sosi.data, g_pkt_len-1);
168
    v_last.data    := RESIZE_DP_DATA(v_last.data(g_in_dat_w-1 DOWNTO 0));  -- wrap when >= 2**g_in_dat_w
169
    last_snk_in <= v_last;
170
 
171
    -- Signal end of stimuli
172 5 danv
    proc_common_wait_some_cycles(clk, g_wait_last_evt);  -- latency from stimuli to verify depends on the flow control, so wait sufficiently long for last packet to have passed through
173 2 danv
    proc_common_gen_pulse(clk, last_snk_in_evt);
174
    proc_common_wait_some_cycles(clk, 50);
175
    tb_end <= '1';
176
    WAIT;
177
  END PROCESS;
178
 
179
  ------------------------------------------------------------------------------
180
  -- Auxiliary
181
  ------------------------------------------------------------------------------
182
 
183
  -- Map to slv to ease monitoring in wave window
184
  src_out_data <= i_src_out.data(g_in_dat_w-1 DOWNTO 0);
185
 
186
END str;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.