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[/] [encore/] [trunk/] [fpmult/] [src/] [fpmult_stage_pre.vhdl] - Blame information for rev 11

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1 11 aloy.amber
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.fp_generic.all;
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use work.fpmult_stage_pre_comp.all;
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entity fpmult_stage_pre is
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  port(
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    clk:in std_logic;
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    d:in fpmult_stage_pre_in_type;
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    q:out fpmult_stage_pre_out_type
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  );
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end;
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architecture twoproc of fpmult_stage_pre is
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  type reg_type is record
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    a:fp_type;
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    b:fp_type;
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  end record;
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  signal r,rin:reg_type;
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begin
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  comb:process(d,r)
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    variable v:reg_type;
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    variable a_is_normal,b_is_normal:boolean;
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    variable a_is_subnormal,b_is_subnormal:boolean;
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    variable a_is_zero,b_is_zero:boolean;
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    variable a_is_infinite,b_is_infinite:boolean;
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    variable a_is_nan,b_is_nan:boolean;
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    variable is_normal:boolean;
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    variable is_zero:boolean;
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    variable is_infinite:boolean;
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    variable is_nan:boolean;
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  begin
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    -- sample register outputs
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    v:=r;
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    -- overload
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    a_is_normal:=fp_is_normal(d.a);
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    b_is_normal:=fp_is_normal(d.b);
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    a_is_subnormal:=fp_is_subnormal(d.a);
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    b_is_subnormal:=fp_is_subnormal(d.b);
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    a_is_zero:=fp_is_zero(d.a);
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    b_is_zero:=fp_is_zero(d.b);
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    a_is_infinite:=fp_is_infinite(d.a);
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    b_is_infinite:=fp_is_infinite(d.b);
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    a_is_nan:=fp_is_nan(d.a);
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    b_is_nan:=fp_is_nan(d.b);
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    -- This implementation does not support subnormal numbers.
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    -- They are treated as zero.
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    -- This is not in conformance with IEEE-754 but greatly simplifies the implementation
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    --
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    -- +-----------+------+----------+-----------+----------+------+
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    -- |           | zero |  normal  | subnormal | infinite | NaN  |
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    -- +-----------+------+----------+-----------+----------+------+
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    -- |   zero    | zero |   zero   |   zero    |   qNaN   | qNaN |
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    -- |  normal   | zero |  A * B   |   zero    | infinite | qNaN |
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    -- | subnormal | zero |   zero   |   zero    |   qNaN   | qNaN |
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    -- | infinite  | qNaN | infinite |   qNaN    | infinite | qNaN |
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    -- |    NaN    | qNaN |   qNaN   |   qNaN    |   qNaN   | qNaN |
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    -- +-----------+------+----------+-----------+----------+------+
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    is_normal:=false;
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    is_zero:=false;
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    is_infinite:=false;
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    is_nan:=false;
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    if a_is_zero or b_is_zero then
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      if a_is_zero and b_is_zero then
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        is_zero:=true;
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      end if;
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      if a_is_normal or b_is_normal then
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        is_zero:=true;
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      end if;
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      if a_is_subnormal or b_is_subnormal then
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        is_zero:=true;
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      end if;
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      if a_is_infinite or b_is_infinite then
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        is_nan:=true;
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      end if;
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      if a_is_nan or b_is_nan then
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        is_nan:=true;
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      end if;
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    end if;
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    if a_is_normal or b_is_normal then
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      if a_is_normal and b_is_normal then
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        is_normal:=true;
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      end if;
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      if a_is_subnormal or b_is_subnormal then
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        is_zero:=true;
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      end if;
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      if a_is_infinite or b_is_infinite then
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        is_infinite:=true;
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      end if;
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      if a_is_nan or b_is_nan then
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        is_nan:=true;
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      end if;
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    end if;
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    if a_is_subnormal or b_is_subnormal then
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      if a_is_subnormal and b_is_subnormal then
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        is_zero:=true;
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      end if;
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      if a_is_infinite or b_is_infinite then
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        is_nan:=true;
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      end if;
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      if a_is_nan or b_is_nan then
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        is_nan:=true;
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      end if;
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    end if;
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    if a_is_infinite or b_is_infinite then
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      if a_is_infinite and b_is_infinite then
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        is_infinite:=true;
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      end if;
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      if a_is_nan or b_is_nan then
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        is_nan:=true;
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      end if;
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    end if;
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    if a_is_nan and b_is_nan then
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      is_nan:=true;
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    end if;
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    if is_zero or is_infinite or is_nan then
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      v.b:=d.b(31)&"01111111"&"00000000000000000000000";  -- 1.0
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    end if;
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    if is_normal then
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      v.b:=d.b;
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    end if;
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    if is_zero then
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      v.a:=d.a(31)&"00000000"&"00000000000000000000000";  -- 0.0
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    end if;
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    if is_infinite then
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      v.a:=d.a(31)&"11111111"&"00000000000000000000000";  -- infinite
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    end if;
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    if is_nan then
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      v.a:=d.a(31)&"11111111"&"10000000000000000000000";  -- qNaN
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    end if;
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    if is_normal then
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      v.a:=d.a;
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    end if;
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    -- drive register inputs
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    rin<=v;
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    -- drive outputs
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    q.a<=r.a;
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    q.b<=r.b;
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  end process;
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  seq:process(clk,rin)
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  begin
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    if rising_edge(clk) then
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      r<=rin;
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    end if;
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  end process;
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end;

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