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[/] [ethmac/] [trunk/] [sim/] [rtl_sim/] [run/] [run_eth_sim_regr.scr] - Blame information for rev 291

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Line No. Rev Author Line
1 291 tadejm
#!/bin/csh -f
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set arg_num = $#argv; # number of arguments
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# current iterration
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set iter = 1;
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# number of tests with DEFINES + test with user defined constants!
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set all_iterations = 3;
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# ATS (Automatic Test System) parameter, which causes displaying 'OK'
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# if all testcases finish OK.
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set ok = 1;
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# Process argument
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set arg_waves = 0;
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set arg_regression = 0;
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if ($arg_num == 0) then
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            echo "    Verification without any parameter !"
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else
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  if ($arg_num == 1) then
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    if (("$1" == "waves") | ("$1" == "-w")) then
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            @ arg_waves = 1;
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            echo "    Verification with parameter : waves !"
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    else
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      if (("$1" == "regression") | ("$1" == "-r")) then
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            @ arg_regression = 1;
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            echo "    Verification with parameter : regression !"
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      else
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            echo "    Not correct parameter ( $1 )"
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            echo "    Correct parameters are:"
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            echo "      'waves' or '-w'"
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            echo "      'regression' or '-r'"
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            exit
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      endif
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    endif
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  else
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    if ($arg_num == 2) then
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      if (("$1" == "waves") | ("$1" == "-w")) then
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            @ arg_waves = 1;
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        if (("$2" == "regression") | ("$2" == "-r")) then
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            @ arg_regression = 1;
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            echo "    Verification with parameter : waves, regression !"
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        else
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            echo "    Not correct parameter ( $2 )"
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            echo "    Correct 2. parameter is:"
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            echo "      'regression' or '-r'"
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            exit
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        endif
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      else
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        if (("$1" == "regression") | ("$1" == "-r")) then
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            @ arg_regression = 1;
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          if (("$2" == "waves") | ("$2" == "-w")) then
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            @ arg_waves = 1;
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            echo "    Verification with parameter : waves, regression !"
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          else
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            echo "    Not correct parameter ( $2 )"
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            echo "    Correct 2. parameter is:"
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            echo "      'waves' or '-w'"
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            exit
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          endif
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        else
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            echo "    Not correct parameter ( $1 )"
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            echo "    Correct parameters are:"
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            echo "      'waves' or '-w'"
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            echo "      'regression' or '-r'"
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            exit
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        endif
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      endif
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    else
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            echo "    Too many parameters ( $arg_num )"
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            echo "    Maximum number of parameters is 2:"
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            echo "      'waves' or '-w'"
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            echo "      'regression' or '-r'"
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            exit
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    endif
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  endif
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endif
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echo ""
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echo "<<<"
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echo "<<< Ethernet MAC VERIFICATION "
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echo "<<<"
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# ITERATION LOOP
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iteration:
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echo ""
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echo "<<<"
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echo "<<< Iteration ${iter}"
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echo "<<<"
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if ($arg_regression == 1) then
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  if ($iter <= $all_iterations) then
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    if ($iter == 1) then
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        echo "<<< Defines:"
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        echo "\tEthernet with GENERIC RAM"
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        echo "-DEFINE REGR" > ../run/defines.args
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    endif
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    if ($iter == 2) then
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        echo "<<< Defines:"
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        echo "\tEthernet with XILINX DISTRIBUTED RAM"
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        echo "-DEFINE REGR -DEFINE ETH_FIFO_XILINX" > ../run/defines.args
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    endif
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    if ($iter == 3) then
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        echo "<<< Defines:"
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        echo "\tEthernet with XILINX BLOCK RAM"
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        echo "-DEFINE REGR -DEFINE XILINX_RAMB4" > ../run/defines.args
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    endif
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  endif
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endif
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# Run NC-Verilog compiler
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echo ""
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echo "\t@@@"
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echo "\t@@@ Compiling sources"
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echo "\t@@@"
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# creating .args file for ncvlog and adding main parameters
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echo "-cdslib ../bin/cds.lib" > ../run/ncvlog.args
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echo "-hdlvar ../bin/hdl.var" >> ../run/ncvlog.args
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echo "-logfile ../log/ncvlog.log" >> ../run/ncvlog.args
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echo "-update" >> ../run/ncvlog.args
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echo "-messages" >> ../run/ncvlog.args
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echo "-INCDIR ../../../../bench/verilog" >> ../run/ncvlog.args
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echo "-INCDIR ../../../../rtl/verilog" >> ../run/ncvlog.args
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echo "-DEFINE SIM" >> ../run/ncvlog.args
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# adding defines to .args file
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if ($arg_regression == 1) then
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    cat ./defines.args >> ../run/ncvlog.args
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endif
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# adding RTL and Sim files to .args file
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cat ../bin/rtl_file_list.lst >> ../run/ncvlog.args
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cat ../bin/sim_file_list.lst >> ../run/ncvlog.args
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# adding device dependent files to .args file
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cat ../bin/xilinx_file_list.lst >> ../run/ncvlog.args
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ncvlog -file ../run/ncvlog.args# > /dev/null;
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echo ""
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# Run the NC-Verilog elaborator (build the design hierarchy)
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echo ""
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echo "\t@@@"
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echo "\t@@@ Building design hierarchy (elaboration)"
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echo "\t@@@"
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ncelab -file ../bin/ncelab_xilinx.args# > /dev/null;
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echo ""
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# Run the NC-Verilog simulator (simulate the design)
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echo ""
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echo "\t###"
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echo "\t### Running tests (this takes a long time!)"
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echo "\t###"
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# creating ncsim.args file for ncsim and adding main parameters
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echo "-cdslib ../bin/cds.lib" > ../run/ncsim.args
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echo "-hdlvar ../bin/hdl.var" >> ../run/ncsim.args
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echo "-logfile ../log/ncsim.log" >> ../run/ncsim.args
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echo "-messages" >> ../run/ncsim.args
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if ($arg_waves == 1) then
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  echo "-input ../bin/ncsim_waves.rc" >> ../run/ncsim.args
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else
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  echo "-input ../bin/ncsim.rc" >> ../run/ncsim.args
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endif
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echo "worklib.ethernet:fun" >> ../run/ncsim.args
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ncsim -file ../run/ncsim.args# > /dev/null
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if ($status != 0) then
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  echo ""
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  echo "TESTS couldn't start due to Errors!"
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  echo ""
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  exit
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else
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  if ($arg_regression == 1) then
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    if ($arg_waves == 1) then
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      mv ../out/waves.shm ../out/i${iter}_waves.shm
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    endif
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    # For ATS - counting all 'FAILED' words
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    set FAIL_COUNT = `grep -c "FAILED" ../log/eth_tb.log`
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    if ($FAIL_COUNT != 0) then
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        # Test didn't pass!!!
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        @ ok = 0;
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    endif
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    # Move 'log' files
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    mv ../log/eth_tb.log ../log/i${iter}_eth_tb.log
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    mv ../log/eth_tb_phy.log ../log/i${iter}_eth_tb_phy.log
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    mv ../log/eth_tb_memory.log ../log/i${iter}_eth_tb_memory.log
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    mv ../log/eth_tb_host.log ../log/i${iter}_eth_tb_host.log
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    mv ../log/eth_tb_wb_s_mon.log ../log/i${iter}_eth_tb_wb_s_mon.log
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    mv ../log/eth_tb_wb_m_mon.log ../log/i${iter}_eth_tb_wb_m_mon.log
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  endif
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endif
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echo ""
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@ iter += 1;
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if (($arg_regression == 1) && ($iter <= $all_iterations)) then
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    goto iteration
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else
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#   rm ./defines.args
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    echo ""
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    echo "<<<"
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    echo "<<< End of VERIFICATION"
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    echo "<<<"
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    echo "<<<"
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    echo "<<< -------------------------------------------------"
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    echo "<<<"
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    # For ATS - displaying 'OK' when tests pass successfuly
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    echo " "
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    echo "Simulation finished:"
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    if ($ok == 1) then
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        echo "OK"
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    else
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        echo "FAILED"
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    endif
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endif
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