OpenCores
URL https://opencores.org/ocsvn/fat_32_file_parser/fat_32_file_parser/trunk

Subversion Repositories fat_32_file_parser

[/] [fat_32_file_parser/] [trunk/] [ipcore_dir/] [tmp/] [_xmsgs/] [xst.xmsgs] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 craighaywo
2
7
8
Message file "usenglish/ip.msg" wasn't found.
9
10
 
11
0: (0,0)   : 4x4096        u:4
12
13
 
14
1: (4,0)         : 4x4096        u:4
15
16
 
17
0: (0,0)   : 4x4096        u:4
18
19
 
20
1: (4,0)         : 4x4096        u:4
21
22
 
23
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_input_block.vhd" Line 691: Comparison between arrays of unequal length always returns FALSE.
24
25
 
26
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_input_block.vhd" Line 707: Comparison between arrays of unequal length always returns FALSE.
27
28
 
29
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_prim_width.vhd" Line 978: Range is empty (null range)
30
31
 
32
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_prim_width.vhd" Line 978: Assignment ignored
33
34
 
35
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_prim_width.vhd" Line 979: Range is empty (null range)
36
37
 
38
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_prim_width.vhd" Line 979: Assignment ignored
39
40
 
41
$Id: get_init_bmg_v7_2.c,v 1.3 2011/07/25 06:20:41 Exp $
42
43
 
44
Reading MIF file at /home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/FONT_MEM.mif
45
46
 
47
Memory initialization file (FONT_MEM.mif) depth is smaller than memory depth.
48
49
 
50
Memory initialization file (FONT_MEM.mif) has words wider than 8 bits, right-aligning.
51
52
 
53
Default data (0 hex) will persist where not overwritten by MIF file.
54
55
 
56
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_prim_wrapper_s3_init.vhd" Line 371: Net <pad_dout_a[7]> does not have a driver.
57
58
 
59
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_prim_wrapper_s3_init.vhd" Line 372: Net <pad_dout_b[7]> does not have a driver.
60
61
 
62
$Id: get_init_bmg_v7_2.c,v 1.3 2011/07/25 06:20:41 Exp $
63
64
 
65
Reading MIF file at /home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/FONT_MEM.mif
66
67
 
68
Memory initialization file (FONT_MEM.mif) depth is smaller than memory depth.
69
70
 
71
Memory initialization file (FONT_MEM.mif) has words wider than 8 bits, right-aligning.
72
73
 
74
Default data (0 hex) will persist where not overwritten by MIF file.
75
76
 
77
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_generic_cstr.vhd" Line 1546: Comparison between arrays of unequal length always returns FALSE.
78
79
 
80
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_generic_cstr.vhd" Line 1559: Comparison between arrays of unequal length always returns FALSE.
81
82
 
83
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <doutb> of the instance <U0> is unconnected or connected to loadless signal.
84
85
 
86
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <rdaddrecc> of the instance <U0> is unconnected or connected to loadless signal.
87
88
 
89
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_bid> of the instance <U0> is unconnected or connected to loadless signal.
90
91
 
92
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_bresp> of the instance <U0> is unconnected or connected to loadless signal.
93
94
 
95
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_rid> of the instance <U0> is unconnected or connected to loadless signal.
96
97
 
98
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_rdata> of the instance <U0> is unconnected or connected to loadless signal.
99
100
 
101
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_rresp> of the instance <U0> is unconnected or connected to loadless signal.
102
103
 
104
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_rdaddrecc> of the instance <U0> is unconnected or connected to loadless signal.
105
106
 
107
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <sbiterr> of the instance <U0> is unconnected or connected to loadless signal.
108
109
 
110
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <dbiterr> of the instance <U0> is unconnected or connected to loadless signal.
111
112
 
113
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_awready> of the instance <U0> is unconnected or connected to loadless signal.
114
115
 
116
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_wready> of the instance <U0> is unconnected or connected to loadless signal.
117
118
 
119
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_bvalid> of the instance <U0> is unconnected or connected to loadless signal.
120
121
 
122
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_arready> of the instance <U0> is unconnected or connected to loadless signal.
123
124
 
125
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_rlast> of the instance <U0> is unconnected or connected to loadless signal.
126
127
 
128
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_rvalid> of the instance <U0> is unconnected or connected to loadless signal.
129
130
 
131
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_sbiterr> of the instance <U0> is unconnected or connected to loadless signal.
132
133
 
134
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/FONT_MEM.vhd" line 163: Output port <s_axi_dbiterr> of the instance <U0> is unconnected or connected to loadless signal.
135
136
 
137
Input <S_AXI_AWID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
138
139
 
140
Input <S_AXI_AWADDR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
141
142
 
143
Input <S_AXI_AWLEN> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
144
145
 
146
Input <S_AXI_AWSIZE> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
147
148
 
149
Input <S_AXI_AWBURST> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
150
151
 
152
Input <S_AXI_WDATA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
153
154
 
155
Input <S_AXI_WSTRB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
156
157
 
158
Input <S_AXI_ARID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
159
160
 
161
Input <S_AXI_ARADDR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
162
163
 
164
Input <S_AXI_ARLEN> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
165
166
 
167
Input <S_AXI_ARSIZE> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
168
169
 
170
Input <S_AXI_ARBURST> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
171
172
 
173
Input <S_AClk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
174
175
 
176
Input <S_ARESETN> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
177
178
 
179
Input <S_AXI_AWVALID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
180
181
 
182
Input <S_AXI_WLAST> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
183
184
 
185
Input <S_AXI_WVALID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
186
187
 
188
Input <S_AXI_BREADY> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
189
190
 
191
Input <S_AXI_ARVALID> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
192
193
 
194
Input <S_AXI_RREADY> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
195
196
 
197
Input <S_AXI_INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
198
199
 
200
Input <S_AXI_INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
201
202
 
203
Signal 'S_AXI_BID', unconnected in block 'blk_mem_gen_v7_2_xst', is tied to its initial value (0000).
204
205
 
206
Signal <S_AXI_BRESP> is used but never assigned. This sourceless signal will be automatically connected to value GND.
207
208
 
209
Signal 'S_AXI_RID', unconnected in block 'blk_mem_gen_v7_2_xst', is tied to its initial value (0000).
210
211
 
212
Signal <S_AXI_RDATA> is used but never assigned. This sourceless signal will be automatically connected to value GND.
213
214
 
215
Signal <S_AXI_RRESP> is used but never assigned. This sourceless signal will be automatically connected to value GND.
216
217
 
218
Signal <S_AXI_RDADDRECC> is used but never assigned. This sourceless signal will be automatically connected to value GND.
219
220
 
221
Signal <S_AXI_AWREADY> is used but never assigned. This sourceless signal will be automatically connected to value GND.
222
223
 
224
Signal <S_AXI_WREADY> is used but never assigned. This sourceless signal will be automatically connected to value GND.
225
226
 
227
Signal <S_AXI_BVALID> is used but never assigned. This sourceless signal will be automatically connected to value GND.
228
229
 
230
Signal <S_AXI_ARREADY> is used but never assigned. This sourceless signal will be automatically connected to value GND.
231
232
 
233
Signal <S_AXI_RLAST> is used but never assigned. This sourceless signal will be automatically connected to value GND.
234
235
 
236
Signal <S_AXI_RVALID> is used but never assigned. This sourceless signal will be automatically connected to value GND.
237
238
 
239
Signal <S_AXI_SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
240
241
 
242
Signal <S_AXI_DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
243
244
 
245
Input <WEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
246
247
 
248
Input <ADDRB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
249
250
 
251
Input <DINB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
252
253
 
254
Input <RSTA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
255
256
 
257
Input <ENA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
258
259
 
260
Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
261
262
 
263
Input <CLKB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
264
265
 
266
Input <RSTB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
267
268
 
269
Input <ENB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
270
271
 
272
Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
273
274
 
275
Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
276
277
 
278
Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
279
280
 
281
Signal <INJECTDBITERR_I> is used but never assigned. This sourceless signal will be automatically connected to value GND.
282
283
 
284
Signal <INJECTSBITERR_I> is used but never assigned. This sourceless signal will be automatically connected to value GND.
285
286
 
287
Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
288
289
 
290
Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
291
292
 
293
Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
294
295
 
296
Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
297
298
 
299
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_generic_cstr.vhd" line 1342: Output port <SBITERR> of the instance <ramloop[0].ram.r> is unconnected or connected to loadless signal.
300
301
 
302
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_generic_cstr.vhd" line 1342: Output port <DBITERR> of the instance <ramloop[0].ram.r> is unconnected or connected to loadless signal.
303
304
 
305
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_generic_cstr.vhd" line 1342: Output port <SBITERR> of the instance <ramloop[1].ram.r> is unconnected or connected to loadless signal.
306
307
 
308
"/home/craig/Documents/CW/Git_Repos/hw_client/ipcore_dir/tmp/_cg/_dbg/blk_mem_gen_v7_2/blk_mem_gen_generic_cstr.vhd" line 1342: Output port <DBITERR> of the instance <ramloop[1].ram.r> is unconnected or connected to loadless signal.
309
310
 
311
Signal <RDADDRECC> is used but never assigned. This sourceless signal will be automatically connected to value GND.
312
313
 
314
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
315
316
 
317
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
318
319
 
320
Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
321
322
 
323
Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
324
325
 
326
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
327
328
 
329
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
330
331
 
332
Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
333
334
 
335
Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
336
337
 
338
Signal 'pad_dout_a<31:4>', unconnected in block 'blk_mem_gen_prim_wrapper_s3_init_1', is tied to its initial value (0000000000000000000000000000).
339
340
 
341
Signal 'pad_dout_b<31:4>', unconnected in block 'blk_mem_gen_prim_wrapper_s3_init_1', is tied to its initial value (0000000000000000000000000000).
342
343
 
344
Input <INJECTSBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
345
346
 
347
Input <INJECTDBITERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
348
349
 
350
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
351
352
 
353
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
354
355
 
356
Input <REGCEA> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
357
358
 
359
Input <REGCEB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
360
361
 
362
Signal 'pad_dout_a<31:4>', unconnected in block 'blk_mem_gen_prim_wrapper_s3_init_2', is tied to its initial value (0000000000000000000000000000).
363
364
 
365
Signal 'pad_dout_b<31:4>', unconnected in block 'blk_mem_gen_prim_wrapper_s3_init_2', is tied to its initial value (0000000000000000000000000000).
366
367
 
368
Input <DOUTB_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
369
370
 
371
Input <RDADDRECC_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
372
373
 
374
Input <CLKB> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
375
376
 
377
Input <SBITERR_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
378
379
 
380
Input <DBITERR_I> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
381
382
 
383
Signal <RDADDRECC> is used but never assigned. This sourceless signal will be automatically connected to value GND.
384
385
 
386
Signal <SBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
387
388
 
389
Signal <DBITERR> is used but never assigned. This sourceless signal will be automatically connected to value GND.
390
391
 
392
HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
393
394
 
395
You have chosen to run a version of XST which is not the default solution
396
for the specified device family. You are free to use it in order to take
397
advantage of its enhanced HDL parsing/elaboration capabilities. However,
398
please be aware that you may be impacted by  language support differences.
399
This version may also result in circuit performance and device utilization
400
differences for your particular design. You can always revert back to the
401
default XST solution by setting the "use_new_parser" option to value "no"
402
on the XST command line or in the XST process properties panel.
403
404
 
405
406
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.