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[/] [forwardcom/] [manual/] [fwc_softcore.tex] - Blame information for rev 166

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% chapter included in forwardcom.tex
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\documentclass[forwardcom.tex]{subfiles}
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\begin{document}
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\RaggedRight
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\chapter{Softcore}
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A hardware implementation of ForwardCom as an FPGA softcore is available at \\
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\href{https://github.com/ForwardCom/softcoreA}{github.com/ForwardCom/softcoreA}
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\vv
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\subsubsection{Features of softcore model A version 1.00}
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\begin{itemize}
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\item Runs on Nexys A7-100T FPGA board
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\item Maximum clock frequency 50 - 70 MHz, depending on configuration
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\item 32-bit or 64-bit registers
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\item Can execute one instruction per clock cycle
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\item Data memory 32 kB. Code memory 64 kB. Call stack 1023 entries.
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\item Implements all integer instructions, except multiplication, division, push, pop
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\item Implements all instruction formats and all addressing modes defined by the ForwardCom standard version 1.11.
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\item No vector registers yet. No floating point instructions
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\item No system calls, no memory protection. Useful for embedded designs
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\item Memory reads and writes must be aligned
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\item RS232 serial interface for standard input and output
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\item On-chip loader (uses 2 kB code memory)
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\item On-chip debug interface
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\item On-chip event counter
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\item Code examples and test suite provided
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\end{itemize}
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\vv
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Please see the
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\href{https://github.com/ForwardCom/softcoreA/raw/main/softcore_A.pdf}{manual for the softcore}
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for details and documentation.
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\vv
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\end{document}

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