OpenCores
URL https://opencores.org/ocsvn/forwardcom/forwardcom/trunk

Subversion Repositories forwardcom

[/] [forwardcom/] [trunk/] [defines.vh] - Blame information for rev 167

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 25 Agner
//////////////////////////////////////////////////////////////////////////////////
2
// Engineer:       Agner Fog
3
// 
4
// Create Date:    2020-06-06
5
// Last modified:  2021-08-07
6
// Module Name:    defines.vh
7
// Project Name:   ForwardCom soft core
8
// Target Devices: Artix 7
9
// Tool Versions:  Vivado v. 2020.1
10
// License:        CERN-OHL-W v. 2 or later
11
// Description:    Various global constants
12
//////////////////////////////////////////////////////////////////////////////////
13
 
14
// Important: Remember to set the clock frequency to the value in the config_.. file
15
 
16
// Choose configuration:
17
//`include "config_r32.vh"             // 32 bit registers, 32kB data RAM, 64 kB code RAM, 68 MHz
18
`include "config_r64.vh"               // 64 bit registers, 32kB data RAM, 64 kB code RAM, 58 MHz
19
 
20
 
21
`timescale 1ns / 1ps                   // set time scale for simulation
22
 
23
////////////////////////////////////////////////////////////////////////////////////
24
//
25
//          Constants used during building
26
//
27
////////////////////////////////////////////////////////////////////////////////////
28
 
29
 
30
// Fields in the instruction templates
31
`define IL     31:30                   // instruction length field
32
`define MODE   29:27                   // mode field
33
`define ILMODE 31:27                   // combined IL and mode field
34
`define OP1    26:21                   // op1 field
35
`define RD     20:16                   // RD: destination operand field
36
`define M      15                      // M bit extends mode field
37
`define OT     15:13                   // operand type field, including M bit
38
`define RS     12:8                    // RS: first source operand field
39
`define MASK   7:5                     // mask field
40
`define RT     4:0                     // RT: second source operand field
41
`define MODE   29:27                   // mode field
42
`define IM1    7:0                     // immediate field in format B, 8 bits
43
`define IM1S   7                       // sign bit of IM1
44
`define IM2E   47:32                   // immediate field 2 in format E, 16 bits
45
`define IM2ES  47                      // sign bit of IM2E
46
`define IM3E   53:48                   // immediate field 3 in format E, 6 bits
47
`define IM3EX  55:48                   // immediate field 3 in format E, extended into OP2
48
`define IM3EXS 55                      // sign bit of IM3EX
49
`define OP2    55:54                   // op2 field in format E
50
`define RU     60:56                   // RU: third source operand field in format E
51
`define MODE2  63:61                   // mode2 field in format E
52
 
53
// Values for operand type
54
`define OT_INT8     0                  //  8 bit integer
55
`define OT_INT16    1                  // 16 bit integer
56
`define OT_INT32    2                  // 32 bit integer
57
`define OT_INT64    3                  // 64 bit integer
58
`define OT_INT128   4                  // 128 bit integer
59
`define OT_FLOAT32  5                  // single precision float
60
`define OT_FLOAT64  6                  // double precision float
61
`define OT_FLOAT128 7                  // quadruple precision float
62
`define OT_FLOAT16  1                  // half precision float
63
 
64
// Values for instruction category
65
`define CAT_MULTI  2'b00               // multi-format instruction
66
`define CAT_SINGLE 2'b01               // single-format instruction
67
`define CAT_JUMP   2'b10               // control transfer instruction, i.e. jump, call, return
68
 
69
// Values for instruction format
70
`define FORMAT_A  2'b00                // format A 
71
`define FORMAT_E  2'b01                // format E
72
`define FORMAT_B  2'b10                // format B
73
`define FORMAT_C  2'b11                // format C
74
 
75
// Values for use of registers
76
`define REG_UNUSED  0                  // register is unused
77
`define REG_OPERAND 1                  // register is a general purpose register input operand
78
`define REG_VECTOR  2                  // register is a vector register input operand
79
`define REG_SYSTEM  3                  // register is a system register
80
`define REG_POINTER 4                  // register is a memory base pointer (RS only)
81
`define REG_INDEX   4                  // register is a scaled array index (RT only)
82
`define REG_LENGTH  5                  // register specifies vector length (RT only)
83
 
84
// Values for scale factor applied to index register
85
`define SCALE_NONE  0                  // index is not scaled
86
`define SCALE_OS    1                  // index is scaled by operand size
87
`define SCALE_MINUS 2                  // index is scaled by -1
88
`define SCALE_UNDEF 2'bXX              // no index register
89
 
90
// Values for address offset field
91
`define OFFSET_NONE  0                 // no offset to pointer register
92
`define OFFSET_1     1                 // 8 bit offset in IM1, scaled by operand size
93
`define OFFSET_2     2                 // 16 bit offset in IM2, not scaled
94
`define OFFSET_3     3                 // 24, 32, or 64 bit offset in IM2 or IM4, not scaled
95
 
96
// Values for immediate operand field
97
`define IMMED_NONE  0                  // no immediate operand
98
`define IMMED_1     1                  // 8 bit immediate operand in IM1
99
`define IMMED_2     2                  // 16 bit immediate operand in {IM2,IM1} for format C, or IM2 for format E
100
`define IMMED_3     3                  // 32 or 64 bit immediate operand
101
 
102
// Values for result type
103
`define RESULT_REG   0                 // result is a register, general purpose or vector
104
`define RESULT_SYS   1                 // result is a system register.
105
`define RESULT_MEM   2                 // result is a memory output
106
`define RESULT_NONE  3                 // result is nothing or none of the above
107
 
108
// Fallback option
109
`define FALLBACK_NONE   0              // no fallback
110
`define FALLBACK_SOURCE 1              // first source register is used for fallback
111
`define FALLBACK_RU     2              // separate fallback register in RU field
112
`define FALLBACK_RS     3              // separate fallback register in RS field
113
`define FALLBACK_RT     4              // separate fallback register in RT field
114
 
115
// Special register numbers in register file
116
`define NUMCONTR       32              // numeric control register
117
`define THREADP        33              // thread pointer
118
`define DATAP          34              // data section pointer
119
 
120
// Instruction OP1 values. These are not necessarily identical to the values in the assembler and emulator
121
`define II_NOP              0          // nop instruction
122
`define II_MOVE             2          // move instruction
123
`define II_STORE            1          // write to memory
124
`define II_SIGN_EXTEND      4          // sign_extend
125
`define II_SIGN_EXTEND_ADD  5          // sign_extend_add
126
`define II_COMPARE          7          // compare
127
`define II_ADD              8          // add
128
`define II_SUB              9          // sub
129
`define II_SUB_REV         10          // sub_rev
130
`define II_MUL             11          // mul
131
`define II_MUL_HI          12          // mul_hi
132
`define II_MUL_HI_U        13          // mul_hi_u
133
`define II_DIV             14          // div
134
`define II_DIV_U           15          // div_u
135
`define II_DIV_REV         16          // div_rev 
136
`define II_REM             18          // rem
137
`define II_REM_U           19          // rem_u
138
`define II_MIN             20          // min
139
`define II_MIN_U           21          // min_u
140
`define II_MAX             22          // max
141
`define II_MAX_U           23          // max_u
142
`define II_AND             26          // and
143
`define II_OR              27          // or
144
`define II_XOR             28          // xor
145
`define II_MUL_2POW        32          // mul_2pow
146
`define II_SHIFT_LEFT      32          // shift_left
147
`define II_ROTATE          33          // rotate
148
`define II_SHIFT_RIGHT_S   34          // shift_right_s
149
`define II_SHIFT_RIGHT_U   35          // shift_right_u
150
`define II_CLEAR_BIT       36          // clear_bit
151
`define II_SET_BIT         37          // set_bit
152
`define II_TOGGLE_BIT      38          // toggle_bit
153
`define II_TEST_BIT        39          // test_bit
154
`define II_TEST_BITS_AND   40          // test_bits_and
155
`define II_TEST_BITS_OR    41          // test_bits_or
156
`define II_ADD_FLOAT16     44          // add float16
157
`define II_SUB_FLOAT16     45          // sub float16
158
`define II_MUL_FLOAT16     46          // mul float16
159
`define II_MUL_ADD_FLOAT16 48          // mul_add float16
160
`define II_MUL_ADD         49          // mul_add
161
`define II_MUL_ADD2        50          // mul_add2
162
`define II_ADD_ADD         51          // add_add
163
`define II_SELECT_BITS     52          // select_bits
164
`define II_FUNNEL_SHIFT    53          // funnel_shift
165
 
166
`define II_STOREI           8          // write immediate to memory, format 2.5
167
`define II_FENCE           16          // fence instruction, format 2.5
168
`define II_CMPSWAP         18          // compare_swap instruction format, 2.5 
169
`define II_XTR_STORE       32          // extract_store instruction
170
`define II_CLEAR           58          // clear instruction
171
`define II_WR_SPEC         33          // write_spec instruction
172
`define II_WR_CAPA         35          // write_capabilities instruction
173
`define II_ONE_OP           4          // multiformat instructions with one input have op1 <= II_ONE_OP 
174
`define II_VECTORS_USED    59          // vectors_used instruction
175
`define II_UNCOND_JUMP     15          // unconditional jump or call <= this value
176
`define II_INDIRECT_JUMP   58          // indirect jump instructions in format 1.6B or 2.5.0
177
`define II_JUMP_RELATIVE   60          // multiway jump instructions in format 1.6A
178
`define II_RETURN          62          // return instruction
179
`define II_25_VECT         32          // first vector instruction in format 2.5A
180
`define II_31_VECT         32          // first vector instruction in format 3.1A
181
 
182
`define II_3OP_FIRST       48          // first multiformat instruction with three input operands 
183
`define II_3OP_LAST        55          // last multiformat instruction with three input operands
184
`define II_COMPARE_FIRST   26          // first conditional jump instruction with no result register   
185
`define II_COMPARE_LAST    47          // last conditional jump instruction with no result register   
186
 
187
// Instructions with IM3 used for option bits in format E. Used in addressgenerator.sv
188
// II_COMPARE, II_SIGN_EXTEND_ADD, II_TEST_BIT, II_TEST_BITS_AND, II_TEST_BITS_OR,
189
// II_DIV, II_DIV_REV, `II_DIV_U
190
// II_MUL_ADD_FLOAT16, II_MUL_ADD, II_MUL_ADD2, II_ADD_ADD, 
191
 
192
// Instructions with first and last operands swapped
193
// II_SUB_REV, II_DIV_REV, II_MUL_ADD2 
194
 
195
 
196
// Instructions with half precision operands
197
`define II_ADD_H14         40          // half precision add format 1.4
198
`define II_MUL_H14         41          // half precision mul format 1.4
199
 
200
// Other single format instructions
201
// Format 1.1C
202
`define II_MOVEU11          3          // move 16 bits zero extended format 1.1C
203
`define II_SHIFT_MOVE_11    4          // shift left by IM1, move
204
`define II_MOVE11_LAST      5          // last instruction with 1 operand in format 1.1C
205
`define II_ADD11            6          // add 16 bits sign extended
206
`define II_MUL11            8          // multiply 16 bits sign extended
207
`define II_SHIFT_ADD_11    10          // shift left by IM1, add
208
`define II_SHIFT_AND_11    12          // shift left by IM1, and
209
`define II_SHIFT_OR_11     14          // shift left by IM1, or
210
`define II_SHIFT_XOR_11    16          // shift left by IM1, xor
211
`define II_ADDSHIFT16_11   18          // shift left by 16, add
212
 
213
// Format 1.2B
214
`define II_GETLEN_12        0          // getlen instruction format 1.2
215
`define II_GETNUM_12        1          // getnum instruction format 1.2
216
 
217
// Format 1.8B
218
`define II_SHIFT_ABS18      0          // abs
219
`define II_BITSCAN_18       2          // bitscan
220
`define II_ROUNDP2_18       3          // roundp2
221
`define II_POPCOUNT_18      4          // popcount
222
`define II_READ_SPEC18     32          // read_spec 
223
`define II_WRITE_SPEC18    33          // read_spec
224
`define II_READ_CAP18      34          // read_capabilities
225
`define II_WRITE_CAP18     35          // write_capabilities
226
`define II_READ_PERF18     36          // read_perf. must be even
227
`define II_READ_PERFS18    37          // read_perfs = II_READ_PERF18 + 1
228
`define II_READ_SYS18      38          // read_sys
229
`define II_WRITE_SYS18     39          // write_sys
230
`define II_INPUT_18        62          // input instruction format 1.2 and 1.8
231
`define II_OUTPUT_18       63          // output instruction format 1.2 and 1.8
232
 
233
// Format 2.x
234
`define II_MOVE_BITS        0          // move bits instruction op1, single format 2.X.7-0.1
235
`define II2_MOVE_BITS       1          // move bits instruction op2, single format 2.X.7-0.1
236
`define II_MASK_LENGTH      1          // mask length instruction op1, single format 2.2.7-1.1
237
`define II2_MASK_LENGTH     1          // mask length instruction op2, single format 2.2.7-1.1
238
`define II_TRUTH_TAB3       8          // truth_tab3 instruction op1, single format 2.0.6 or 2.2.6 - 8.1
239
`define II2_TRUTH_TAB3      1          // truth_tab3 op2
240
 
241
// Format 2.6A
242
`define II_LOAD_HI_26       0          // load_hi instruction format 2.6
243
 
244
// Format 2.9A
245
`define II_MOVE_HI_29       0          // move high 32 bit instruction format 2.9
246
`define II_INSERT_HI_29     1          // insert_hi
247
`define II_ADDU_29          2          // add 
248
`define II_SUBU_29          3          // sub 
249
`define II_ADD_HI_29        4          // add 
250
`define II_AND_HI_29        5          // and high 
251
`define II_OR_HI_29         6          // or high 
252
`define II_XOR_HI_29        7          // xor high
253
`define II_ADDRESS_29      32          // address
254
 
255
// jump instructions
256
`define IJ_SUB_JZ               0      // subtract, jump if zero
257
`define IJ_SUB_JNEG             2      // subtract, jump if negative
258
`define IJ_SUB_JPOS             4      // subtract, jump if positive
259
`define IJ_SUB_JOVFLW           6      // subtract, jump if overflow
260
`define IJ_SUB_JBORROW          8      // subtract, jump if borrow
261
`define IJ_AND_JZ              10      // and, jump if zero
262
`define IJ_OR_JZ               12      // or,  jump if zero
263
`define IJ_XOR_JZ              14      // xor, jump if zero
264
`define IJ_ADD_JZ              16      // add, jump if zero
265
`define IJ_ADD_JNEG            18      // add, jump if negative
266
`define IJ_ADD_JPOS            20      // add, jump if positive
267
`define IJ_ADD_JOVFLW          22      // add, jump if overflow
268
`define IJ_ADD_JCARRY          24      // add, jump if carry
269
`define IJ_TEST_BIT_JTRUE      26      // test single bit, jump if 1
270
`define IJ_TEST_BITS_AND       28      // test bits, jump if all 1
271
`define IJ_TEST_BITS_OR        30      // test bits, jump if all 1
272
`define IJ_COMPARE_JEQ         32      // compare, jump if equal
273
`define IJ_COMPARE_JSB         34      // compare, jump if signed below
274
`define IJ_COMPARE_JSA         36      // compare, jump if signed above
275
`define IJ_COMPARE_JUB         38      // compare, jump if unsigned below
276
`define IJ_COMPARE_JUA         40      // compare, jump if unsigned above
277
`define IJ_INC_COMP_JBELOW     48      // increment. jump if below n
278
`define IJ_INC_COMP_JABOVE     50      // increment. jump if above n
279
`define IJ_SUB_MAXLEN_JPOS     52      // subtract max vector length, jump while positive
280
`define IJ_LAST_CONDITIONAL    55      // last two-way conditional jump
281
`define IJ_JUMP_INDIRECT_REG   58      // indirect jump to register, format 1.7
282
`define IJ_JUMP_INDIRECT_MEM   58      // indirect jump to memory address, format 1.6 and 2.5.0
283
`define IJ_JUMP_DIRECT         58      // direct unconditional jump, format 2.5.4 and 3.1.1
284
`define IJ_JUMP_RELATIVE       60      // jump with relative pointers in memory, format 1.6 and 2.5.0
285
`define IJ_RETURN              62      // return, format 1.6
286
`define IJ_SYSRETURN           62      // system return, format 1.7
287
`define IJ_SYSCALL             63      // system call
288
`define IJ_TRAP                63      // trap (software interrupt, debug breakpoint), format 1.7
289
`define IJ_CONDITIONAL_TRAP    63      // conditional trap. Format 2.5.3. Not supported. 
290
 
291
// Instruction ID's opx in execution unit for single-format instructions
292
// These values are arbitrary and may be changed. Must be bigger than 63
293
`define IX_UNDEF              127      // unknown instruction
294
`define IX_ABS                 64      // abs format 1.8
295
`define IX_BIT_SCAN            66      // bitscan format 1.8
296
`define IX_ROUNDP2             67      // roundp2 format 1.8
297
`define IX_POPCOUNT            68      // popcount format 1.8
298
`define IX_READ_SPEC           69      // bitscan format 1.8
299
`define IX_WRITE_SPEC          70      // write_spec format 1.8
300
`define IX_READ_CAPABILITIES   71      // read_capab format 1.8
301
`define IX_WRITE_CAPABILITIES  72      // write_capab format 1.8
302
`define IX_READ_PERF           74      // read_perf format 1.8
303
`define IX_READ_PERFS          75      // read_perfs format 1.8
304
`define IX_READ_SYS            76      // read_sys format 1.8
305
`define IX_WRITE_SYS           77      // write_sys format 1.8
306
`define IX_INPUT               78      // input format 1.8
307
`define IX_OUTPUT              79      // output format 1.8
308
`define IX_MOVE_BITS1          80      // move bits instruction, shifting left
309
`define IX_MOVE_BITS2          81      // move bits instruction, shifting right
310
`define IX_SHIFT32             82      // move format 2.9: shift left 32 bits 
311
`define IX_INSERT_HI           83      // insert_high format 2.9. replace high 32 bits 
312
`define IX_ADDRESS             84      // address instruction format 2.9. (replaced by move)
313
`define IX_TRUTH_TAB3          85      // truth_tab3 instruction
314
`define IX_UNCOND_JUMP         90      // unconditional direct self-relative jump
315
`define IX_INDIRECT_JUMP       91      // indirect jump to register or memory
316
`define IX_RELATIVE_JUMP       92      // indirect jump with table of relative addresses
317
 
318
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.