OpenCores
URL https://opencores.org/ocsvn/ft816float/ft816float/trunk

Subversion Repositories ft816float

[/] [ft816float/] [trunk/] [rtl/] [verilog2/] [fpCompare64.sv] - Blame information for rev 90

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 90 robfinch
// ============================================================================
2
//        __
3
//   \\__/ o\    (C) 2007-2023  Robert Finch, Waterloo
4
//    \  __ /    All rights reserved.
5
//     \/_//     robfinch@finitron.ca
6
//       ||
7
//
8
//      fpCompare64.sv
9
//    - floating point comparison unit
10
//    - IEEE 754 representation
11
//
12
//
13
// This source file is free software: you can redistribute it and/or modify
14
// it under the terms of the GNU Lesser General Public License as published
15
// by the Free Software Foundation, either version 3 of the License, or
16
// (at your option) any later version.
17
//
18
// This source file is distributed in the hope that it will be useful,
19
// but WITHOUT ANY WARRANTY; without even the implied warranty of
20
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21
// GNU General Public License for more details.
22
//
23
// You should have received a copy of the GNU General Public License
24
// along with this program.  If not, see .
25
//
26
// ============================================================================
27
 
28
import fp64Pkg::*;
29
 
30
module fpCompare64(a, b, o, inf, nan, snan);
31
input FP64 a, b;
32
output [15:0] o;
33
reg [15:0] o;
34
output inf;
35
output nan;
36
output snan;
37
 
38
// Decompose the operands
39
wire sa;
40
wire sb;
41
wire [fp64Pkg::EMSB:0] xa;
42
wire [fp64Pkg::EMSB:0] xb;
43
wire [fp64Pkg::FMSB:0] ma;
44
wire [fp64Pkg::FMSB:0] mb;
45
wire az, bz;
46
wire nan_a, nan_b;
47
wire infa, infb;
48
 
49
fpDecomp64 u1(.i(a), .sgn(sa), .exp(xa), .man(ma), .vz(az), .inf(infa), .qnan(), .snan(), .nan(nan_a) );
50
fpDecomp64 u2(.i(b), .sgn(sb), .exp(xb), .man(mb), .vz(bz), .inf(infb), .qnan(), .snan(), .nan(nan_b) );
51
 
52
wire unordered = nan_a | nan_b;
53
 
54
wire eq = !unordered & ((az & bz) || (a==b));  // special test for zero
55
wire ne = !((az & bz) || (a==b));       // special test for zero
56
wire gt1 = ({xa,ma} > {xb,mb}) | (infa & ~infb);
57
wire lt1 = ({xa,ma} < {xb,mb}) | (infb & ~infa);
58
 
59
wire lt = sa ^ sb ? sa & !(az & bz): sa ? gt1 : lt1;
60
 
61
always_comb
62
begin
63
        o = 'd0;
64
        o[0] = eq;
65
        o[1] = lt & !unordered;
66
        o[2] = (lt|eq) & !unordered;
67
        o[3] = lt1;
68
        o[4] = unordered;
69
        o[7:5] = 3'd0;
70
        o[8] = ne;
71
        o[9] = ~lt & !unordered;
72
        o[10] = ~(lt|eq) & !unordered;
73
        o[11] = ~lt1;
74
        o[12] = ~unordered;
75
end
76
 
77
// an unorder comparison will signal a nan exception
78
//assign nanx = op!=`FCOR && op!=`FCUN && unordered;
79
assign nan = nan_a|nan_b|(infa & infb);
80
assign snan = (nan_a & ~ma[fp64Pkg::FMSB]) | (nan_b & ~mb[fp64Pkg::FMSB]);
81
assign inf = infa & infb;
82
 
83
endmodule

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.