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[/] [ft816float/] [trunk/] [test_bench/] [fpSincos_tb.sv] - Blame information for rev 90

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1 90 robfinch
`timescale 1ns / 1ps
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// ============================================================================
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//        __
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//   \\__/ o\    (C) 2023  Robert Finch, Waterloo
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//    \  __ /    All rights reserved.
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//     \/_//     robfinch@finitron.ca
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//       ||
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//
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//      fpSincos_tb.sv
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//              - floating point sin/cosine test bench
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//
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program.  If not, see .
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//
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//      Floating Point Multiplier / Divider
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//
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//      This multiplier/divider handles denormalized numbers.
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//      The output format is of an internal expanded representation
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//      in preparation to be fed into a normalization unit, then
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//      rounding. Basically, it's the same as the regular format
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//      except the mantissa is doubled in size, the leading two
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//      bits of which are assumed to be whole bits.
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//
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//
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// ============================================================================
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import fp64Pkg::*;
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module fpSincos_tb();
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reg rst;
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reg clk;
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reg [15:0] adr;
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reg [63:0] b;
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wire [63:0] o;
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reg [63:0] ad,bd;
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wire [63:0] od;
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reg [3:0] rm;
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wire [63:0] sin, cos;
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real a,aa,ab,ac;
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//wire [63:0] doubleA = {a[31], a[30], {3{~a[30]}}, a[29:23], a[22:0], {29{1'b0}}};
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//wire [63:0] doubleB = {b[31], b[30], {3{~b[30]}}, b[29:23], b[22:0], {29{1'b0}}};
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integer outfile;
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initial begin
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        rst = 1'b0;
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        clk = 1'b0;
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        adr = 0;
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        a = $urandom(1);
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        #20 rst = 1;
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        #50 rst = 0;
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        #1000000  $fclose(outfile);
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        #10 $finish;
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end
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always #5
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        clk = ~clk;
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reg [7:0] count;
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wire ld = count==4;
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always @(posedge clk)
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if (rst) begin
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        adr <= 0;
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        count <= 0;
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        a <= 0.0;
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end
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else
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begin
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  if (adr==0) begin
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    outfile = $fopen("f:/cores2023/Float/fpu/test_bench/fpSincos_tvo.txt", "wb");
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    $fwrite(outfile, "rm ------ A ------  ------ SIN -----  ---- SIM sin ---- ------ COS -----  ---- SIM cos ---\n");
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  end
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        count <= count + 1;
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        if (count > 76)
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                count <= 1'd1;
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        if (ld) begin
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                a <= a + 0.01;
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//              a.sign = 1'b0;
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//              a.exp = 11'h3fe;
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//              a.sig = {$urandom(),20'd0};
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                rm <= 3'd0;
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//              a[31:0] <= $urandom();
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//              a[63:32] <= $urandom();
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//              rm <= adr[15:13];
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                //ad <= memd[adr][63: 0];
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                //bd <= memd[adr][127:64];
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        end
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        if (count==76) begin
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                aa <= a;
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                ab <= aa;
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                ac <= ab;
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          $fwrite(outfile, "%h\t%h\t%h\t%h\t%h\t%h\n", rm, $realtobits(ab), sin, $realtobits($sin(ab)), cos, $realtobits($cos(ab)));
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                adr <= adr + 1;
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        end
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end
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fpSincos64 u6 (rst, clk, 3'd0, ld, $realtobits(a), sin, cos);
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endmodule

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