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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-CSRRC-01.S] - Blame information for rev 2

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# RISC-V Compliance Test I-CSRRC-01
#
# Copyright (c) 2017, Codasip Ltd.
# Copyright (c) 2018, Imperas Software Ltd. Additions
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#      * Redistributions of source code must retain the above copyright
#        notice, this list of conditions and the following disclaimer.
#      * Redistributions in binary form must reproduce the above copyright
#        notice, this list of conditions and the following disclaimer in the
#        documentation and/or other materials provided with the distribution.
#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
#        names of its contributors may be used to endorse or promote products
#        derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Specification: RV32I Base Integer Instruction Set, Version 2.0
# Description: Testing instruction CSRRC.
 
#include "compliance_test.h"
#include "compliance_io.h"
#include "test_macros.h"
 
# Test Virtual Machine (TVM) used by program.
RV_COMPLIANCE_RV32M
 
# Test code region.
RV_COMPLIANCE_CODE_BEGIN
 
    RVTEST_IO_INIT
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A1 - general test of csrrc\n");
 
    # Address for test results
    la      x15, test_A1_res
 
    # Register initialization
    li      x1, 1
    li      x2, 0
    li      x3, 0x7FF0FFFF
    li      x4, 0x80000000
    li      x5, -1
    csrrw   x0, mscratch, x5
 
    # Test
    csrrc   x1, mscratch, x1
    csrrw   x1, mscratch, x5
 
    csrrc   x2, mscratch, x2
    csrrw   x2, mscratch, x5
 
    csrrc   x3, mscratch, x3
    csrrw   x3, mscratch, x5
 
    csrrc   x4, mscratch, x4
    csrrw   x4, mscratch, x5
 
    csrrc   x5, mscratch, x5
    csrrw   x5, mscratch, x0
 
    # Store results
    sw      x0, 0(x15)
    sw      x1, 4(x15)
    sw      x2, 8(x15)
    sw      x3, 12(x15)
    sw      x4, 16(x15)
    sw      x5, 20(x15)
 
    //
    // Assert
    //
    RVTEST_IO_CHECK()
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    #RVTEST_IO_ASSERT_GPR_EQ(x1, 0x80000324)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x800F0000)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x7FFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A2 - general test of csrrc\n");
 
    # Address for test results
    la      x5, test_A2_res
 
    # Register initialization
    li      x11, 1
    li      x12, 0
    li      x13, 0x7FF0FFFF
    li      x14, 0x80000000
    li      x15, -1
    csrrw   x0, mscratch, x15
 
    # Test
    csrrc   x11, mscratch, x11
    csrrc   x12, mscratch, x12
    csrrc   x13, mscratch, x13
    csrrc   x14, mscratch, x14
    csrrc   x15, mscratch, x15
    csrrc   x16, mscratch, x0
 
 
    # Store results
    sw      x11, 0(x5)
    sw      x12, 4(x5)
    sw      x13, 8(x5)
    sw      x14, 12(x5)
    sw      x15, 16(x5)
    sw      x16, 20(x5)
 
    RVTEST_IO_ASSERT_GPR_EQ(x11, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x12, 0xFFFFFFFE)
    RVTEST_IO_ASSERT_GPR_EQ(x13, 0xFFFFFFFE)
    RVTEST_IO_ASSERT_GPR_EQ(x14, 0x800F0000)
    RVTEST_IO_ASSERT_GPR_EQ(x15, 0x000F0000)
    RVTEST_IO_ASSERT_GPR_EQ(x16, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B - testing forwarding between instructions\n");
 
    # Address for test results
    la      x26, test_B_res
 
    # Register initialization
    li      x21, 0x12345678
    li      x20, -1
    csrrw   x0, mscratch, x20
 
    # Test
    csrrc   x22, mscratch, x21
    csrrc   x21, mscratch, x22
    csrrw   x23, mscratch, x20
    csrrc   x24, mscratch, x23
    csrrc   x25, mscratch, x0
 
    # store results
    sw      x21, 0(x26)
    sw      x22, 4(x26)
    sw      x23, 8(x26)
    sw      x24, 12(x26)
    sw      x25, 16(x26)
 
    RVTEST_IO_ASSERT_GPR_EQ(x21, 0xEDCBA987)
    RVTEST_IO_ASSERT_GPR_EQ(x22, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x23, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x24, 0xFFFFFFFF)
    RVTEST_IO_ASSERT_GPR_EQ(x25, 0xFFFFFFFF)
 
    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part C - testing writing to x0 and reading from x0\n");
 
    # Address for test results
    la      x1, test_C_res
 
    # Register initialization
    li      x30, 0x42726E6F
    csrrw   x0, mscratch, x30
 
    # Test
    csrrc   x0, mscratch, x30
 
    # store results
    sw      x0, 0(x1)
    sw      x30, 4(x1)
 
 
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x30, 0x42726e6f)
 
    RVTEST_IO_WRITE_STR("# Test part A4  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part D - testing forwarding throught x0\n");
 
    # Address for test results
    la      x2, test_D_res
 
    # Register initialization
    li      x31, 0xF7FF8818
    csrrw   x0, mscratch, x31
 
    # Test
    csrrc   x0, mscratch, x0
    csrrc   x0, mscratch, x0
    csrrc   x31, mscratch, x0
 
    # store results
    sw      x0, 0(x2)
    sw      x31, 4(x2)
 
 
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x31, 0xF7FF8818)
 
    RVTEST_IO_WRITE_STR("# Test part A5  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part E - testing csrrc with same dst and src registers\n");
 
    # Address for test results
    la      x2, test_E_res
 
    # Register initialization
    li      x4, -1
    li      x5, 0x96385274
    li      x7, 0x32165498
    csrrw   x0, mscratch, x4
 
    # Test
    csrrc   x5, mscratch, x5
    csrrc   x7, mscratch, x7
    csrrc   x8, mscratch, x8
 
    # Store results
    sw      x5, 0(x2)
    sw      x7, 4(x2)
    sw      x8, 8(x2)
 
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x69C7AD8B)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x49C1A903)
 
    RVTEST_IO_WRITE_STR("# Test part B  - Complete\n");
 
    RVTEST_IO_WRITE_STR("# Test End\n")
 
 # ---------------------------------------------------------------------------------------------
    # HALT
    RV_COMPLIANCE_HALT
 
RV_COMPLIANCE_CODE_END
 
# Input data section.
    .data
    .align 4
 
 
# Output data section.
RV_COMPLIANCE_DATA_BEGIN
    .align 4
 
test_A1_res:
    .fill 6, 4, -1
test_A2_res:
    .fill 6, 4, -1
test_B_res:
    .fill 5, 4, -1
test_C_res:
    .fill 2, 4, -1
test_D_res:
    .fill 2, 4, -1
test_E_res:
    .fill 3, 4, -1
 
RV_COMPLIANCE_DATA_END     # End of test output data region.

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Subversion Repositories fwrisc

[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-CSRRC-01.S] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	mballance	`# RISC-V Compliance Test I-CSRRC-01`
2			`#`
3			`# Copyright (c) 2017, Codasip Ltd.`
4			`# Copyright (c) 2018, Imperas Software Ltd. Additions`
5			`# All rights reserved.`
6			`#`
7			`# Redistribution and use in source and binary forms, with or without`
8			`# modification, are permitted provided that the following conditions are met:`
9			`# * Redistributions of source code must retain the above copyright`
10			`# notice, this list of conditions and the following disclaimer.`
11			`# * Redistributions in binary form must reproduce the above copyright`
12			`# notice, this list of conditions and the following disclaimer in the`
13			`# documentation and/or other materials provided with the distribution.`
14			`# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the`
15			`# names of its contributors may be used to endorse or promote products`
16			`# derived from this software without specific prior written permission.`
17			`#`
18			`# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS`
19			`# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,`
20			`# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR`
21			`# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.`
22			`# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
23			`# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;`
24			`# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND`
25			`# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT`
26			`# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF`
27			`# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`
28			`#`
29			`# Specification: RV32I Base Integer Instruction Set, Version 2.0`
30			`# Description: Testing instruction CSRRC.`
31
32			`#include "compliance_test.h"`
33			`#include "compliance_io.h"`
34			`#include "test_macros.h"`
35
36			`# Test Virtual Machine (TVM) used by program.`
37			`RV_COMPLIANCE_RV32M`
38
39			`# Test code region.`
40			`RV_COMPLIANCE_CODE_BEGIN`
41
42			`RVTEST_IO_INIT`
43			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
44			`RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")`
45
46			`# ---------------------------------------------------------------------------------------------`
47			`RVTEST_IO_WRITE_STR("# Test part A1 - general test of csrrc\n");`
48
49			`# Address for test results`
50			`la x15, test_A1_res`
51
52			`# Register initialization`
53			`li x1, 1`
54			`li x2, 0`
55			`li x3, 0x7FF0FFFF`
56			`li x4, 0x80000000`
57			`li x5, -1`
58			`csrrw x0, mscratch, x5`
59
60			`# Test`
61			`csrrc x1, mscratch, x1`
62			`csrrw x1, mscratch, x5`
63
64			`csrrc x2, mscratch, x2`
65			`csrrw x2, mscratch, x5`
66
67			`csrrc x3, mscratch, x3`
68			`csrrw x3, mscratch, x5`
69
70			`csrrc x4, mscratch, x4`
71			`csrrw x4, mscratch, x5`
72
73			`csrrc x5, mscratch, x5`
74			`csrrw x5, mscratch, x0`
75
76			`# Store results`
77			`sw x0, 0(x15)`
78			`sw x1, 4(x15)`
79			`sw x2, 8(x15)`
80			`sw x3, 12(x15)`
81			`sw x4, 16(x15)`
82			`sw x5, 20(x15)`
83
84			`//`
85			`// Assert`
86			`//`
87			`RVTEST_IO_CHECK()`
88			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
89			`#RVTEST_IO_ASSERT_GPR_EQ(x1, 0x80000324)`
90			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0xFFFFFFFF)`
91			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x800F0000)`
92			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x7FFFFFFF)`
93			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
94
95			`RVTEST_IO_WRITE_STR("# Test part A1 - Complete\n");`
96
97			`# ---------------------------------------------------------------------------------------------`
98			`RVTEST_IO_WRITE_STR("# Test part A2 - general test of csrrc\n");`
99
100			`# Address for test results`
101			`la x5, test_A2_res`
102
103			`# Register initialization`
104			`li x11, 1`
105			`li x12, 0`
106			`li x13, 0x7FF0FFFF`
107			`li x14, 0x80000000`
108			`li x15, -1`
109			`csrrw x0, mscratch, x15`
110
111			`# Test`
112			`csrrc x11, mscratch, x11`
113			`csrrc x12, mscratch, x12`
114			`csrrc x13, mscratch, x13`
115			`csrrc x14, mscratch, x14`
116			`csrrc x15, mscratch, x15`
117			`csrrc x16, mscratch, x0`
118
119
120			`# Store results`
121			`sw x11, 0(x5)`
122			`sw x12, 4(x5)`
123			`sw x13, 8(x5)`
124			`sw x14, 12(x5)`
125			`sw x15, 16(x5)`
126			`sw x16, 20(x5)`
127
128			`RVTEST_IO_ASSERT_GPR_EQ(x11, 0xFFFFFFFF)`
129			`RVTEST_IO_ASSERT_GPR_EQ(x12, 0xFFFFFFFE)`
130			`RVTEST_IO_ASSERT_GPR_EQ(x13, 0xFFFFFFFE)`
131			`RVTEST_IO_ASSERT_GPR_EQ(x14, 0x800F0000)`
132			`RVTEST_IO_ASSERT_GPR_EQ(x15, 0x000F0000)`
133			`RVTEST_IO_ASSERT_GPR_EQ(x16, 0x00000000)`
134
135			`RVTEST_IO_WRITE_STR("# Test part A2 - Complete\n");`
136
137			`# ---------------------------------------------------------------------------------------------`
138			`RVTEST_IO_WRITE_STR("# Test part B - testing forwarding between instructions\n");`
139
140			`# Address for test results`
141			`la x26, test_B_res`
142
143			`# Register initialization`
144			`li x21, 0x12345678`
145			`li x20, -1`
146			`csrrw x0, mscratch, x20`
147
148			`# Test`
149			`csrrc x22, mscratch, x21`
150			`csrrc x21, mscratch, x22`
151			`csrrw x23, mscratch, x20`
152			`csrrc x24, mscratch, x23`
153			`csrrc x25, mscratch, x0`
154
155			`# store results`
156			`sw x21, 0(x26)`
157			`sw x22, 4(x26)`
158			`sw x23, 8(x26)`
159			`sw x24, 12(x26)`
160			`sw x25, 16(x26)`
161
162			`RVTEST_IO_ASSERT_GPR_EQ(x21, 0xEDCBA987)`
163			`RVTEST_IO_ASSERT_GPR_EQ(x22, 0xFFFFFFFF)`
164			`RVTEST_IO_ASSERT_GPR_EQ(x23, 0x00000000)`
165			`RVTEST_IO_ASSERT_GPR_EQ(x24, 0xFFFFFFFF)`
166			`RVTEST_IO_ASSERT_GPR_EQ(x25, 0xFFFFFFFF)`
167
168			`RVTEST_IO_WRITE_STR("# Test part A3 - Complete\n");`
169
170			`# ---------------------------------------------------------------------------------------------`
171			`RVTEST_IO_WRITE_STR("# Test part C - testing writing to x0 and reading from x0\n");`
172
173			`# Address for test results`
174			`la x1, test_C_res`
175
176			`# Register initialization`
177			`li x30, 0x42726E6F`
178			`csrrw x0, mscratch, x30`
179
180			`# Test`
181			`csrrc x0, mscratch, x30`
182
183			`# store results`
184			`sw x0, 0(x1)`
185			`sw x30, 4(x1)`
186
187
188			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
189			`RVTEST_IO_ASSERT_GPR_EQ(x30, 0x42726e6f)`
190
191			`RVTEST_IO_WRITE_STR("# Test part A4 - Complete\n");`
192
193			`# ---------------------------------------------------------------------------------------------`
194			`RVTEST_IO_WRITE_STR("# Test part D - testing forwarding throught x0\n");`
195
196			`# Address for test results`
197			`la x2, test_D_res`
198
199			`# Register initialization`
200			`li x31, 0xF7FF8818`
201			`csrrw x0, mscratch, x31`
202
203			`# Test`
204			`csrrc x0, mscratch, x0`
205			`csrrc x0, mscratch, x0`
206			`csrrc x31, mscratch, x0`
207
208			`# store results`
209			`sw x0, 0(x2)`
210			`sw x31, 4(x2)`
211
212
213			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
214			`RVTEST_IO_ASSERT_GPR_EQ(x31, 0xF7FF8818)`
215
216			`RVTEST_IO_WRITE_STR("# Test part A5 - Complete\n");`
217
218			`# ---------------------------------------------------------------------------------------------`
219			`RVTEST_IO_WRITE_STR("# Test part E - testing csrrc with same dst and src registers\n");`
220
221			`# Address for test results`
222			`la x2, test_E_res`
223
224			`# Register initialization`
225			`li x4, -1`
226			`li x5, 0x96385274`
227			`li x7, 0x32165498`
228			`csrrw x0, mscratch, x4`
229
230			`# Test`
231			`csrrc x5, mscratch, x5`
232			`csrrc x7, mscratch, x7`
233			`csrrc x8, mscratch, x8`
234
235			`# Store results`
236			`sw x5, 0(x2)`
237			`sw x7, 4(x2)`
238			`sw x8, 8(x2)`
239
240			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
241			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x69C7AD8B)`
242			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x49C1A903)`
243
244			`RVTEST_IO_WRITE_STR("# Test part B - Complete\n");`
245
246			`RVTEST_IO_WRITE_STR("# Test End\n")`
247
248			`# ---------------------------------------------------------------------------------------------`
249			`# HALT`
250			`RV_COMPLIANCE_HALT`
251
252			`RV_COMPLIANCE_CODE_END`
253
254			`# Input data section.`
255			`.data`
256			`.align 4`
257
258
259			`# Output data section.`
260			`RV_COMPLIANCE_DATA_BEGIN`
261			`.align 4`
262
263			`test_A1_res:`
264			`.fill 6, 4, -1`
265			`test_A2_res:`
266			`.fill 6, 4, -1`
267			`test_B_res:`
268			`.fill 5, 4, -1`
269			`test_C_res:`
270			`.fill 2, 4, -1`
271			`test_D_res:`
272			`.fill 2, 4, -1`
273			`test_E_res:`
274			`.fill 3, 4, -1`
275
276			`RV_COMPLIANCE_DATA_END # End of test output data region.`