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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-JAL-01.S] - Blame information for rev 2

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# RISC-V Compliance Test I-JAL-01
#
# Copyright (c) 2017, Codasip Ltd.
# Copyright (c) 2018, Imperas Software Ltd. Additions
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#      * Redistributions of source code must retain the above copyright
#        notice, this list of conditions and the following disclaimer.
#      * Redistributions in binary form must reproduce the above copyright
#        notice, this list of conditions and the following disclaimer in the
#        documentation and/or other materials provided with the distribution.
#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
#        names of its contributors may be used to endorse or promote products
#        derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Specification: RV32I Base Integer Instruction Set, Version 2.0
# Description: Testing instruction JAL.
 
#include "compliance_test.h"
#include "compliance_io.h"
#include "test_macros.h"
 
# Test Virtual Machine (TVM) used by program.
RV_COMPLIANCE_RV32M
 
# Test code region.
RV_COMPLIANCE_CODE_BEGIN
 
    RVTEST_IO_INIT
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A1 - general test of JAL\n");
 
    # Address for test results
    la      x1, test_A1_res
 
    # Register initialization
    li      x2, 0x12345678
 
    # Test
    jal     x0, 1f
    li      x2, 0
 
1:
 
    # Store results
    sw      x0, 0(x1)
    sw      x2, 4(x1)
 
    //
    // Assert
    //
    RVTEST_IO_CHECK()
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x12345678)
 
    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A2 - test of JAL - jumps forward, backward\n");
 
    # Address for test results
    la      x1, test_A2_res
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0x0FEDCBA9
 
    # Test
    jal     x0, 2f
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
1:
    li      x3, 0x87654321
    jal     x0, 3f
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
2:
    li      x2, 0x9ABCDEF0
    jal     x0, 1b
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
3:
 
    # Store results
    sw      x0, 0(x1)
    sw      x2, 4(x1)
    sw      x3, 8(x1)
    sw      x4, 12(x1)
 
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x9ABCDEF0)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x87654321)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x0FEDCBA9)
 
    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B1 - test of JAL - linking\n");
 
    # Addresses for test data and results
    la      x9, test_B1_data
    la      x10, test_B1_res
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0xFFFFFFFF
    li      x5, 0xFFFFFFFF
    li      x6, 0x55555555
 
    # Load testdata
    lw      x25, 0(x9)
    lw      x24, 4(x9)
 
    # Test
    jal     x1, 1f
 
B1a_link:
    li      x3, 0x22222222
    jal     x31, 2f
 
B1b_link:
    li      x5, 0x44444444
    jal     x0, 3f
 
1:
    li      x2, 0x11111111
    jalr    x0, x1, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
2:
    li      x4, 0x33333333
    jalr    x0, x31, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
3:
    xor     x7, x1, x25
    xor     x8, x31, x24
 
 
    # Store results
    sw      x2, 0(x10)
    sw      x3, 4(x10)
    sw      x4, 8(x10)
    sw      x5, 12(x10)
    sw      x6, 16(x10)
    sw      x7, 20(x10)
    sw      x8, 24(x10)
 
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x11111111)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x22222222)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x33333333)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x55555555)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B2 - test of JAL - linking\n");
 
    # Addresses for test data and results
    la      x9, test_B2_data
    la      x10, test_B2_res
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0xFFFFFFFF
    li      x5, 0xFFFFFFFF
    li      x6, 0xFFFFFFFF
 
    # Load testdata
    lw      x24, 0(x9)
    lw      x25, 4(x9)
 
    # Test
    jal     x0, 2f
 
1:
    li      x3, 0x77777777
    jalr    x0, x31, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
2:
    li      x2, 0x66666666
    jal     x31, 1b
 
B2b_link:
    li      x4, 0x88888888
    jal     x1, 3f
 
B2c_link:
    li      x6, 0xAAAAAAAA
    jal     x0, 4f
 
3:
    li      x5, 0x99999999
    jalr    x0, x1, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
4:
    xor     x7, x31, x24
    xor     x8, x1, x25
 
    # Store results
    sw      x2, 0(x10)
    sw      x3, 4(x10)
    sw      x4, 8(x10)
    sw      x5, 12(x10)
    sw      x6, 16(x10)
    sw      x7, 20(x10)
    sw      x8, 24(x10)
 
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x66666666)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x77777777)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x88888888)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0xAAAAAAAA)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A4  - Complete\n");
 
    RVTEST_IO_WRITE_STR("# Test End\n")
 
 # ---------------------------------------------------------------------------------------------
    # HALT
    RV_COMPLIANCE_HALT
 
 
 
RV_COMPLIANCE_CODE_END
 
# Input data section.
    .data
    .align 4
 
test_B1_data:
    .word B1a_link
    .word B1b_link
test_B2_data:
    .word B2b_link
    .word B2c_link
 
 
# Output data section.
RV_COMPLIANCE_DATA_BEGIN
    .align 4
 
test_A1_res:
    .fill 2, 4, -1
test_A2_res:
    .fill 4, 4, -1
test_B1_res:
    .fill 7, 4, -1
test_B2_res:
    .fill 7, 4, -1
 
RV_COMPLIANCE_DATA_END

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Subversion Repositories fwrisc

[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-JAL-01.S] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	mballance	`# RISC-V Compliance Test I-JAL-01`
2			`#`
3			`# Copyright (c) 2017, Codasip Ltd.`
4			`# Copyright (c) 2018, Imperas Software Ltd. Additions`
5			`# All rights reserved.`
6			`#`
7			`# Redistribution and use in source and binary forms, with or without`
8			`# modification, are permitted provided that the following conditions are met:`
9			`# * Redistributions of source code must retain the above copyright`
10			`# notice, this list of conditions and the following disclaimer.`
11			`# * Redistributions in binary form must reproduce the above copyright`
12			`# notice, this list of conditions and the following disclaimer in the`
13			`# documentation and/or other materials provided with the distribution.`
14			`# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the`
15			`# names of its contributors may be used to endorse or promote products`
16			`# derived from this software without specific prior written permission.`
17			`#`
18			`# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS`
19			`# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,`
20			`# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR`
21			`# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.`
22			`# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
23			`# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;`
24			`# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND`
25			`# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT`
26			`# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF`
27			`# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`
28			`#`
29			`# Specification: RV32I Base Integer Instruction Set, Version 2.0`
30			`# Description: Testing instruction JAL.`
31
32			`#include "compliance_test.h"`
33			`#include "compliance_io.h"`
34			`#include "test_macros.h"`
35
36			`# Test Virtual Machine (TVM) used by program.`
37			`RV_COMPLIANCE_RV32M`
38
39			`# Test code region.`
40			`RV_COMPLIANCE_CODE_BEGIN`
41
42			`RVTEST_IO_INIT`
43			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
44			`RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")`
45
46			`# ---------------------------------------------------------------------------------------------`
47			`RVTEST_IO_WRITE_STR("# Test part A1 - general test of JAL\n");`
48
49			`# Address for test results`
50			`la x1, test_A1_res`
51
52			`# Register initialization`
53			`li x2, 0x12345678`
54
55			`# Test`
56			`jal x0, 1f`
57			`li x2, 0`
58
59			`1:`
60
61			`# Store results`
62			`sw x0, 0(x1)`
63			`sw x2, 4(x1)`
64
65			`//`
66			`// Assert`
67			`//`
68			`RVTEST_IO_CHECK()`
69			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
70			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x12345678)`
71
72			`RVTEST_IO_WRITE_STR("# Test part A1 - Complete\n");`
73
74			`# ---------------------------------------------------------------------------------------------`
75			`RVTEST_IO_WRITE_STR("# Test part A2 - test of JAL - jumps forward, backward\n");`
76
77			`# Address for test results`
78			`la x1, test_A2_res`
79
80			`# Register initialization`
81			`li x2, 0xFFFFFFFF`
82			`li x3, 0xFFFFFFFF`
83			`li x4, 0x0FEDCBA9`
84
85			`# Test`
86			`jal x0, 2f`
87			`li x2, 0`
88			`li x3, 0`
89			`li x4, 0`
90
91			`1:`
92			`li x3, 0x87654321`
93			`jal x0, 3f`
94			`li x2, 0`
95			`li x3, 0`
96			`li x4, 0`
97
98			`2:`
99			`li x2, 0x9ABCDEF0`
100			`jal x0, 1b`
101			`li x2, 0`
102			`li x3, 0`
103			`li x4, 0`
104
105			`3:`
106
107			`# Store results`
108			`sw x0, 0(x1)`
109			`sw x2, 4(x1)`
110			`sw x3, 8(x1)`
111			`sw x4, 12(x1)`
112
113			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
114			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x9ABCDEF0)`
115			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x87654321)`
116			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x0FEDCBA9)`
117
118			`RVTEST_IO_WRITE_STR("# Test part A2 - Complete\n");`
119
120			`# ---------------------------------------------------------------------------------------------`
121			`RVTEST_IO_WRITE_STR("# Test part B1 - test of JAL - linking\n");`
122
123			`# Addresses for test data and results`
124			`la x9, test_B1_data`
125			`la x10, test_B1_res`
126
127			`# Register initialization`
128			`li x2, 0xFFFFFFFF`
129			`li x3, 0xFFFFFFFF`
130			`li x4, 0xFFFFFFFF`
131			`li x5, 0xFFFFFFFF`
132			`li x6, 0x55555555`
133
134			`# Load testdata`
135			`lw x25, 0(x9)`
136			`lw x24, 4(x9)`
137
138			`# Test`
139			`jal x1, 1f`
140
141			`B1a_link:`
142			`li x3, 0x22222222`
143			`jal x31, 2f`
144
145			`B1b_link:`
146			`li x5, 0x44444444`
147			`jal x0, 3f`
148
149			`1:`
150			`li x2, 0x11111111`
151			`jalr x0, x1, 0`
152			`li x2, 0`
153			`li x3, 0`
154			`li x4, 0`
155			`li x5, 0`
156			`li x6, 0`
157
158			`2:`
159			`li x4, 0x33333333`
160			`jalr x0, x31, 0`
161			`li x2, 0`
162			`li x3, 0`
163			`li x4, 0`
164			`li x5, 0`
165			`li x6, 0`
166
167			`3:`
168			`xor x7, x1, x25`
169			`xor x8, x31, x24`
170
171
172			`# Store results`
173			`sw x2, 0(x10)`
174			`sw x3, 4(x10)`
175			`sw x4, 8(x10)`
176			`sw x5, 12(x10)`
177			`sw x6, 16(x10)`
178			`sw x7, 20(x10)`
179			`sw x8, 24(x10)`
180
181			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x11111111)`
182			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x22222222)`
183			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x33333333)`
184			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
185			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0x55555555)`
186			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)`
187			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)`
188
189			`RVTEST_IO_WRITE_STR("# Test part A3 - Complete\n");`
190
191			`# ---------------------------------------------------------------------------------------------`
192			`RVTEST_IO_WRITE_STR("# Test part B2 - test of JAL - linking\n");`
193
194			`# Addresses for test data and results`
195			`la x9, test_B2_data`
196			`la x10, test_B2_res`
197
198			`# Register initialization`
199			`li x2, 0xFFFFFFFF`
200			`li x3, 0xFFFFFFFF`
201			`li x4, 0xFFFFFFFF`
202			`li x5, 0xFFFFFFFF`
203			`li x6, 0xFFFFFFFF`
204
205			`# Load testdata`
206			`lw x24, 0(x9)`
207			`lw x25, 4(x9)`
208
209			`# Test`
210			`jal x0, 2f`
211
212			`1:`
213			`li x3, 0x77777777`
214			`jalr x0, x31, 0`
215			`li x2, 0`
216			`li x3, 0`
217			`li x4, 0`
218			`li x5, 0`
219			`li x6, 0`
220
221			`2:`
222			`li x2, 0x66666666`
223			`jal x31, 1b`
224
225			`B2b_link:`
226			`li x4, 0x88888888`
227			`jal x1, 3f`
228
229			`B2c_link:`
230			`li x6, 0xAAAAAAAA`
231			`jal x0, 4f`
232
233			`3:`
234			`li x5, 0x99999999`
235			`jalr x0, x1, 0`
236			`li x2, 0`
237			`li x3, 0`
238			`li x4, 0`
239			`li x5, 0`
240			`li x6, 0`
241
242			`4:`
243			`xor x7, x31, x24`
244			`xor x8, x1, x25`
245
246			`# Store results`
247			`sw x2, 0(x10)`
248			`sw x3, 4(x10)`
249			`sw x4, 8(x10)`
250			`sw x5, 12(x10)`
251			`sw x6, 16(x10)`
252			`sw x7, 20(x10)`
253			`sw x8, 24(x10)`
254
255			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x66666666)`
256			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x77777777)`
257			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x88888888)`
258			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
259			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0xAAAAAAAA)`
260			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)`
261			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)`
262
263			`RVTEST_IO_WRITE_STR("# Test part A4 - Complete\n");`
264
265			`RVTEST_IO_WRITE_STR("# Test End\n")`
266
267			`# ---------------------------------------------------------------------------------------------`
268			`# HALT`
269			`RV_COMPLIANCE_HALT`
270
271
272
273			`RV_COMPLIANCE_CODE_END`
274
275			`# Input data section.`
276			`.data`
277			`.align 4`
278
279			`test_B1_data:`
280			`.word B1a_link`
281			`.word B1b_link`
282			`test_B2_data:`
283			`.word B2b_link`
284			`.word B2c_link`
285
286
287			`# Output data section.`
288			`RV_COMPLIANCE_DATA_BEGIN`
289			`.align 4`
290
291			`test_A1_res:`
292			`.fill 2, 4, -1`
293			`test_A2_res:`
294			`.fill 4, 4, -1`
295			`test_B1_res:`
296			`.fill 7, 4, -1`
297			`test_B2_res:`
298			`.fill 7, 4, -1`
299
300			`RV_COMPLIANCE_DATA_END`