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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-JALR-01.S] - Blame information for rev 2

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# RISC-V Compliance Test I-JALR-01
#
# Copyright (c) 2017, Codasip Ltd.
# Copyright (c) 2018, Imperas Software Ltd. Additions
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#      * Redistributions of source code must retain the above copyright
#        notice, this list of conditions and the following disclaimer.
#      * Redistributions in binary form must reproduce the above copyright
#        notice, this list of conditions and the following disclaimer in the
#        documentation and/or other materials provided with the distribution.
#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
#        names of its contributors may be used to endorse or promote products
#        derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Specification: RV32I Base Integer Instruction Set, Version 2.0
# Description: Testing instruction JALR.
 
#include "compliance_test.h"
#include "compliance_io.h"
#include "test_macros.h"
 
# Test Virtual Machine (TVM) used by program.
RV_COMPLIANCE_RV32M
 
# Test code region.
RV_COMPLIANCE_CODE_BEGIN
 
    RVTEST_IO_INIT
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A1 - general test of JALR\n");
 
    # Address for test results
    la      x1, test_A1_res
 
    # Register initialization
    li      x2, 0x12345678
 
    # Test
    la      x3, 1f
    jalr    x0, x3, 0
    li      x2, 0
 
1:
 
    # Store results
    sw      x0, 0(x1)
    sw      x2, 4(x1)
 
    //
    // Assert
    //
    RVTEST_IO_CHECK()
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x12345678)
 
    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part A2 - test of JALR - jumps forward, backward\n");
 
    # Address for test results
    la      x1, test_A2_res
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0x0FEDCBA9
 
    # Test
    la      x31, 2f
    jalr    x0, x31, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
1:
    li      x3, 0x87654321
    la      x5, 3f
    jalr    x0, x5, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
2:
    li      x2, 0x9ABCDEF0
    la      x15, 1b
    jalr    x0, x15, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
 
3:
 
    # Store results
    sw      x0, 0(x1)
    sw      x2, 4(x1)
    sw      x3, 8(x1)
    sw      x4, 12(x1)
 
    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x9ABCDEF0)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x87654321)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x0FEDCBA9)
 
    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B1 - test of JALR - linking\n");
 
    # Addresses for test data and results
    la      x9, test_B1_data
    la      x10, test_B1_res
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0xFFFFFFFF
    li      x5, 0xFFFFFFFF
    li      x6, 0x55555555
 
    # Load testdata
    lw      x25, 0(x9)
    lw      x24, 4(x9)
 
    # Test
    la      x7, 1f
    jalr    x1, x7, 0
 
B1a_link:
    li      x3, 0x22222222
    la      x8, 2f
    jalr    x31, x8, 0
 
B1b_link:
    li      x5, 0x44444444
    la      x30, 3f
    jalr    x0, x30, 0
 
1:
    li      x2, 0x11111111
    jalr    x0, x1, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
2:
    li      x4, 0x33333333
    jalr    x0, x31, 0
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
3:
    xor     x7, x1, x25
    xor     x8, x31, x24
 
 
    # Store results
    sw      x2, 0(x10)
    sw      x3, 4(x10)
    sw      x4, 8(x10)
    sw      x5, 12(x10)
    sw      x6, 16(x10)
    sw      x7, 20(x10)
    sw      x8, 24(x10)
 
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x11111111)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x22222222)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x33333333)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x55555555)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part B2 - test of JALR - linking, low bit of address is cleared\n");
 
    # Addresses for test data and results
    la      x9, test_B2_data
    la      x10, test_B2_res
 
    # Register initialization
    li      x2, 0xFFFFFFFF
    li      x3, 0xFFFFFFFF
    li      x4, 0xFFFFFFFF
    li      x5, 0xFFFFFFFF
    li      x6, 0xFFFFFFFF
 
    # Load testdata
    lw      x24, 0(x9)
    lw      x25, 4(x9)
 
    # Test
    la      x15, 2f
    jalr    x0, x15, 0
 
1:
    li      x3, 0x77777777
    jalr    x0, x31, 1
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
2:
    li      x2, 0x66666666
    la      x31, 1b + 1
    jalr    x31, x31, 0
 
B2b_link:
    li      x4, 0x88888888
    la      x1, 3f + 1
    jalr    x1, x1, 0
 
B2c_link:
    li      x6, 0xAAAAAAAA
    la      x30, 4f
    jalr    x0, x30, 0
 
3:
    li      x5, 0x99999999
    jalr    x0, x1, 1
    li      x2, 0
    li      x3, 0
    li      x4, 0
    li      x5, 0
    li      x6, 0
 
4:
    xor     x7, x31, x24
    xor     x8, x1, x25
 
    # Store results
    sw      x2, 0(x10)
    sw      x3, 4(x10)
    sw      x4, 8(x10)
    sw      x5, 12(x10)
    sw      x6, 16(x10)
    sw      x7, 20(x10)
    sw      x8, 24(x10)
 
    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x66666666)
    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x77777777)
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x88888888)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0xAAAAAAAA)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)
    RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)
 
    RVTEST_IO_WRITE_STR("# Test part A4  - Complete\n");
 
    # ---------------------------------------------------------------------------------------------
    RVTEST_IO_WRITE_STR("# Test part C - JALR using immediate\n");
 
    # Address for test results
    la      x1, test_C_res
 
    # Test
    li      x4, 0x11111111
    la      x3, 1f - 1
    jalr    x0, x3, 1
    li      x4, 0
 
1:
    li      x5, 0x22222222
    la      x3, 1f + 1
    jalr    x0, x3, 0xFFFFFFFF
    li      x5, 0
 
1:
    li      x6, 0x33333333
    la      x3, 1f - 2047
    jalr    x0, x3, 0x000007FF
    li      x6, 0
 
1:
    li      x7, 0x44444444
    la      x3, 1f + 2048
    jalr    x0, x3, 0xFFFFF800
    li      x7, 0
 
1:
    # Store results
    sw      x4, 0(x1)
    sw      x5, 4(x1)
    sw      x6, 8(x1)
    sw      x7, 12(x1)
 
    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x11111111)
    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x22222222)
    RVTEST_IO_ASSERT_GPR_EQ(x6, 0x33333333)
    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x44444444)
 
    RVTEST_IO_WRITE_STR("# Test part A5  - Complete\n");
 
    RVTEST_IO_WRITE_STR("# Test End\n")
 
 # ---------------------------------------------------------------------------------------------
    # HALT
    RV_COMPLIANCE_HALT
 
 
 
RV_COMPLIANCE_CODE_END
 
# Input data section.
    .data
    .align 4
 
test_B1_data:
    .word B1a_link
    .word B1b_link
test_B2_data:
    .word B2b_link
    .word B2c_link
 
# Output data section.
RV_COMPLIANCE_DATA_BEGIN
    .align 4
 
test_A1_res:
    .fill 2, 4, -1
test_A2_res:
    .fill 4, 4, -1
test_B1_res:
    .fill 7, 4, -1
test_B2_res:
    .fill 7, 4, -1
test_C_res:
    .fill 4, 4, -1
 
RV_COMPLIANCE_DATA_END     # End of test output data region.

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Subversion Repositories fwrisc

[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-JALR-01.S] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	mballance	`# RISC-V Compliance Test I-JALR-01`
2			`#`
3			`# Copyright (c) 2017, Codasip Ltd.`
4			`# Copyright (c) 2018, Imperas Software Ltd. Additions`
5			`# All rights reserved.`
6			`#`
7			`# Redistribution and use in source and binary forms, with or without`
8			`# modification, are permitted provided that the following conditions are met:`
9			`# * Redistributions of source code must retain the above copyright`
10			`# notice, this list of conditions and the following disclaimer.`
11			`# * Redistributions in binary form must reproduce the above copyright`
12			`# notice, this list of conditions and the following disclaimer in the`
13			`# documentation and/or other materials provided with the distribution.`
14			`# * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the`
15			`# names of its contributors may be used to endorse or promote products`
16			`# derived from this software without specific prior written permission.`
17			`#`
18			`# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS`
19			`# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,`
20			`# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR`
21			`# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.`
22			`# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL`
23			`# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;`
24			`# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND`
25			`# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT`
26			`# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF`
27			`# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.`
28			`#`
29			`# Specification: RV32I Base Integer Instruction Set, Version 2.0`
30			`# Description: Testing instruction JALR.`
31
32			`#include "compliance_test.h"`
33			`#include "compliance_io.h"`
34			`#include "test_macros.h"`
35
36			`# Test Virtual Machine (TVM) used by program.`
37			`RV_COMPLIANCE_RV32M`
38
39			`# Test code region.`
40			`RV_COMPLIANCE_CODE_BEGIN`
41
42			`RVTEST_IO_INIT`
43			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
44			`RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")`
45
46			`# ---------------------------------------------------------------------------------------------`
47			`RVTEST_IO_WRITE_STR("# Test part A1 - general test of JALR\n");`
48
49			`# Address for test results`
50			`la x1, test_A1_res`
51
52			`# Register initialization`
53			`li x2, 0x12345678`
54
55			`# Test`
56			`la x3, 1f`
57			`jalr x0, x3, 0`
58			`li x2, 0`
59
60			`1:`
61
62			`# Store results`
63			`sw x0, 0(x1)`
64			`sw x2, 4(x1)`
65
66			`//`
67			`// Assert`
68			`//`
69			`RVTEST_IO_CHECK()`
70			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
71			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x12345678)`
72
73			`RVTEST_IO_WRITE_STR("# Test part A1 - Complete\n");`
74
75			`# ---------------------------------------------------------------------------------------------`
76			`RVTEST_IO_WRITE_STR("# Test part A2 - test of JALR - jumps forward, backward\n");`
77
78			`# Address for test results`
79			`la x1, test_A2_res`
80
81			`# Register initialization`
82			`li x2, 0xFFFFFFFF`
83			`li x3, 0xFFFFFFFF`
84			`li x4, 0x0FEDCBA9`
85
86			`# Test`
87			`la x31, 2f`
88			`jalr x0, x31, 0`
89			`li x2, 0`
90			`li x3, 0`
91			`li x4, 0`
92
93			`1:`
94			`li x3, 0x87654321`
95			`la x5, 3f`
96			`jalr x0, x5, 0`
97			`li x2, 0`
98			`li x3, 0`
99			`li x4, 0`
100
101			`2:`
102			`li x2, 0x9ABCDEF0`
103			`la x15, 1b`
104			`jalr x0, x15, 0`
105			`li x2, 0`
106			`li x3, 0`
107			`li x4, 0`
108
109			`3:`
110
111			`# Store results`
112			`sw x0, 0(x1)`
113			`sw x2, 4(x1)`
114			`sw x3, 8(x1)`
115			`sw x4, 12(x1)`
116
117			`RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)`
118			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x9ABCDEF0)`
119			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x87654321)`
120			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x0FEDCBA9)`
121
122			`RVTEST_IO_WRITE_STR("# Test part A2 - Complete\n");`
123
124			`# ---------------------------------------------------------------------------------------------`
125			`RVTEST_IO_WRITE_STR("# Test part B1 - test of JALR - linking\n");`
126
127			`# Addresses for test data and results`
128			`la x9, test_B1_data`
129			`la x10, test_B1_res`
130
131			`# Register initialization`
132			`li x2, 0xFFFFFFFF`
133			`li x3, 0xFFFFFFFF`
134			`li x4, 0xFFFFFFFF`
135			`li x5, 0xFFFFFFFF`
136			`li x6, 0x55555555`
137
138			`# Load testdata`
139			`lw x25, 0(x9)`
140			`lw x24, 4(x9)`
141
142			`# Test`
143			`la x7, 1f`
144			`jalr x1, x7, 0`
145
146			`B1a_link:`
147			`li x3, 0x22222222`
148			`la x8, 2f`
149			`jalr x31, x8, 0`
150
151			`B1b_link:`
152			`li x5, 0x44444444`
153			`la x30, 3f`
154			`jalr x0, x30, 0`
155
156			`1:`
157			`li x2, 0x11111111`
158			`jalr x0, x1, 0`
159			`li x2, 0`
160			`li x3, 0`
161			`li x4, 0`
162			`li x5, 0`
163			`li x6, 0`
164
165			`2:`
166			`li x4, 0x33333333`
167			`jalr x0, x31, 0`
168			`li x2, 0`
169			`li x3, 0`
170			`li x4, 0`
171			`li x5, 0`
172			`li x6, 0`
173
174			`3:`
175			`xor x7, x1, x25`
176			`xor x8, x31, x24`
177
178
179			`# Store results`
180			`sw x2, 0(x10)`
181			`sw x3, 4(x10)`
182			`sw x4, 8(x10)`
183			`sw x5, 12(x10)`
184			`sw x6, 16(x10)`
185			`sw x7, 20(x10)`
186			`sw x8, 24(x10)`
187
188			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x11111111)`
189			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x22222222)`
190			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x33333333)`
191			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
192			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0x55555555)`
193			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)`
194			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)`
195
196			`RVTEST_IO_WRITE_STR("# Test part A3 - Complete\n");`
197
198			`# ---------------------------------------------------------------------------------------------`
199			`RVTEST_IO_WRITE_STR("# Test part B2 - test of JALR - linking, low bit of address is cleared\n");`
200
201			`# Addresses for test data and results`
202			`la x9, test_B2_data`
203			`la x10, test_B2_res`
204
205			`# Register initialization`
206			`li x2, 0xFFFFFFFF`
207			`li x3, 0xFFFFFFFF`
208			`li x4, 0xFFFFFFFF`
209			`li x5, 0xFFFFFFFF`
210			`li x6, 0xFFFFFFFF`
211
212			`# Load testdata`
213			`lw x24, 0(x9)`
214			`lw x25, 4(x9)`
215
216			`# Test`
217			`la x15, 2f`
218			`jalr x0, x15, 0`
219
220			`1:`
221			`li x3, 0x77777777`
222			`jalr x0, x31, 1`
223			`li x2, 0`
224			`li x3, 0`
225			`li x4, 0`
226			`li x5, 0`
227			`li x6, 0`
228
229			`2:`
230			`li x2, 0x66666666`
231			`la x31, 1b + 1`
232			`jalr x31, x31, 0`
233
234			`B2b_link:`
235			`li x4, 0x88888888`
236			`la x1, 3f + 1`
237			`jalr x1, x1, 0`
238
239			`B2c_link:`
240			`li x6, 0xAAAAAAAA`
241			`la x30, 4f`
242			`jalr x0, x30, 0`
243
244			`3:`
245			`li x5, 0x99999999`
246			`jalr x0, x1, 1`
247			`li x2, 0`
248			`li x3, 0`
249			`li x4, 0`
250			`li x5, 0`
251			`li x6, 0`
252
253			`4:`
254			`xor x7, x31, x24`
255			`xor x8, x1, x25`
256
257			`# Store results`
258			`sw x2, 0(x10)`
259			`sw x3, 4(x10)`
260			`sw x4, 8(x10)`
261			`sw x5, 12(x10)`
262			`sw x6, 16(x10)`
263			`sw x7, 20(x10)`
264			`sw x8, 24(x10)`
265
266			`RVTEST_IO_ASSERT_GPR_EQ(x2, 0x66666666)`
267			`RVTEST_IO_ASSERT_GPR_EQ(x3, 0x77777777)`
268			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x88888888)`
269			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)`
270			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0xAAAAAAAA)`
271			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x00000000)`
272			`RVTEST_IO_ASSERT_GPR_EQ(x8, 0x00000000)`
273
274			`RVTEST_IO_WRITE_STR("# Test part A4 - Complete\n");`
275
276			`# ---------------------------------------------------------------------------------------------`
277			`RVTEST_IO_WRITE_STR("# Test part C - JALR using immediate\n");`
278
279			`# Address for test results`
280			`la x1, test_C_res`
281
282			`# Test`
283			`li x4, 0x11111111`
284			`la x3, 1f - 1`
285			`jalr x0, x3, 1`
286			`li x4, 0`
287
288			`1:`
289			`li x5, 0x22222222`
290			`la x3, 1f + 1`
291			`jalr x0, x3, 0xFFFFFFFF`
292			`li x5, 0`
293
294			`1:`
295			`li x6, 0x33333333`
296			`la x3, 1f - 2047`
297			`jalr x0, x3, 0x000007FF`
298			`li x6, 0`
299
300			`1:`
301			`li x7, 0x44444444`
302			`la x3, 1f + 2048`
303			`jalr x0, x3, 0xFFFFF800`
304			`li x7, 0`
305
306			`1:`
307			`# Store results`
308			`sw x4, 0(x1)`
309			`sw x5, 4(x1)`
310			`sw x6, 8(x1)`
311			`sw x7, 12(x1)`
312
313			`RVTEST_IO_ASSERT_GPR_EQ(x4, 0x11111111)`
314			`RVTEST_IO_ASSERT_GPR_EQ(x5, 0x22222222)`
315			`RVTEST_IO_ASSERT_GPR_EQ(x6, 0x33333333)`
316			`RVTEST_IO_ASSERT_GPR_EQ(x7, 0x44444444)`
317
318			`RVTEST_IO_WRITE_STR("# Test part A5 - Complete\n");`
319
320			`RVTEST_IO_WRITE_STR("# Test End\n")`
321
322			`# ---------------------------------------------------------------------------------------------`
323			`# HALT`
324			`RV_COMPLIANCE_HALT`
325
326
327
328			`RV_COMPLIANCE_CODE_END`
329
330			`# Input data section.`
331			`.data`
332			`.align 4`
333
334			`test_B1_data:`
335			`.word B1a_link`
336			`.word B1b_link`
337			`test_B2_data:`
338			`.word B2b_link`
339			`.word B2c_link`
340
341			`# Output data section.`
342			`RV_COMPLIANCE_DATA_BEGIN`
343			`.align 4`
344
345			`test_A1_res:`
346			`.fill 2, 4, -1`
347			`test_A2_res:`
348			`.fill 4, 4, -1`
349			`test_B1_res:`
350			`.fill 7, 4, -1`
351			`test_B2_res:`
352			`.fill 7, 4, -1`
353			`test_C_res:`
354			`.fill 4, 4, -1`
355
356			`RV_COMPLIANCE_DATA_END # End of test output data region.`