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Subversion Repositories fwrisc

[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32ui/] [rv64ui/] [bne.S] - Blame information for rev 2

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Line No.	Rev	Author	Line
1	2	mballance	`# See LICENSE for license details.`
2
3			`#*****************************************************************************`
4			`# bne.S`
5			`#-----------------------------------------------------------------------------`
6			`#`
7			`# Test bne instruction.`
8			`#`
9
10			`#include "riscv_test.h"`
11			`#include "compliance_test.h"`
12			`#include "compliance_io.h"`
13			`#include "aw_test_macros.h"`
14
15
16			`RVTEST_RV64U`
17			`RVTEST_CODE_BEGIN`
18
19			`#-------------------------------------------------------------`
20			`# Branch tests`
21			`#-------------------------------------------------------------`
22
23			`# Each test checks both forward and backward branches`
24
25			`TEST_BR2_OP_TAKEN( 2, bne, 0, 1 );`
26			`TEST_BR2_OP_TAKEN( 3, bne, 1, 0 );`
27			`TEST_BR2_OP_TAKEN( 4, bne, -1, 1 );`
28			`TEST_BR2_OP_TAKEN( 5, bne, 1, -1 );`
29
30			`TEST_BR2_OP_NOTTAKEN( 6, bne, 0, 0 );`
31			`TEST_BR2_OP_NOTTAKEN( 7, bne, 1, 1 );`
32			`TEST_BR2_OP_NOTTAKEN( 8, bne, -1, -1 );`
33
34			`#-------------------------------------------------------------`
35			`# Bypassing tests`
36			`#-------------------------------------------------------------`
37
38			`TEST_BR2_SRC12_BYPASS( 9, 0, 0, bne, 0, 0 );`
39			`TEST_BR2_SRC12_BYPASS( 10, 0, 1, bne, 0, 0 );`
40			`TEST_BR2_SRC12_BYPASS( 11, 0, 2, bne, 0, 0 );`
41			`TEST_BR2_SRC12_BYPASS( 12, 1, 0, bne, 0, 0 );`
42			`TEST_BR2_SRC12_BYPASS( 13, 1, 1, bne, 0, 0 );`
43			`TEST_BR2_SRC12_BYPASS( 14, 2, 0, bne, 0, 0 );`
44
45			`TEST_BR2_SRC12_BYPASS( 15, 0, 0, bne, 0, 0 );`
46			`TEST_BR2_SRC12_BYPASS( 16, 0, 1, bne, 0, 0 );`
47			`TEST_BR2_SRC12_BYPASS( 17, 0, 2, bne, 0, 0 );`
48			`TEST_BR2_SRC12_BYPASS( 18, 1, 0, bne, 0, 0 );`
49			`TEST_BR2_SRC12_BYPASS( 19, 1, 1, bne, 0, 0 );`
50			`TEST_BR2_SRC12_BYPASS( 20, 2, 0, bne, 0, 0 );`
51
52			`#-------------------------------------------------------------`
53			`# Test delay slot instructions not executed nor bypassed`
54			`#-------------------------------------------------------------`
55
56			`TEST_CASE( 21, x1, 3, \`
57			`li x1, 1; \`
58			`bne x1, x0, 1f; \`
59			`addi x1, x1, 1; \`
60			`addi x1, x1, 1; \`
61			`addi x1, x1, 1; \`
62			`addi x1, x1, 1; \`
63			`1: addi x1, x1, 1; \`
64			`addi x1, x1, 1; \`
65			`)`
66
67			`TEST_PASSFAIL`
68
69			`RVTEST_CODE_END`
70
71			`.data`
72			`RV_COMPLIANCE_DATA_BEGIN`
73			`test_res:`
74			`.fill 30, 4, -1`
75			`RV_COMPLIANCE_DATA_END`
76

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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32ui/] [rv64ui/] [bne.S] - Blame information for rev 2