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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32ui/] [rv64ui/] [srli.S] - Blame information for rev 2

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Line No. Rev Author Line
1 2 mballance
# See LICENSE for license details.
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#*****************************************************************************
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# srli.S
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#-----------------------------------------------------------------------------
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#
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# Test srli instruction.
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#
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#include "riscv_test.h"
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#include "compliance_test.h"
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#include "compliance_io.h"
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#include "aw_test_macros.h"
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RVTEST_RV64U
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RVTEST_CODE_BEGIN
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  #-------------------------------------------------------------
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  # Arithmetic tests
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  #-------------------------------------------------------------
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#define TEST_SRL(n, v, a) \
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  TEST_IMM_OP(n, srli, ((v) & ((1 << (__riscv_xlen-1) << 1) - 1)) >> (a), v, a)
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  TEST_SRL( 2,  0xffffffff80000000, 0  );
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  TEST_SRL( 3,  0xffffffff80000000, 1  );
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  TEST_SRL( 4,  0xffffffff80000000, 7  );
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  TEST_SRL( 5,  0xffffffff80000000, 14 );
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  TEST_SRL( 6,  0xffffffff80000001, 31 );
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  TEST_SRL( 7,  0xffffffffffffffff, 0  );
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  TEST_SRL( 8,  0xffffffffffffffff, 1  );
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  TEST_SRL( 9,  0xffffffffffffffff, 7  );
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  TEST_SRL( 10, 0xffffffffffffffff, 14 );
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  TEST_SRL( 11, 0xffffffffffffffff, 31 );
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  TEST_SRL( 12, 0x0000000021212121, 0  );
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  TEST_SRL( 13, 0x0000000021212121, 1  );
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  TEST_SRL( 14, 0x0000000021212121, 7  );
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  TEST_SRL( 15, 0x0000000021212121, 14 );
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  TEST_SRL( 16, 0x0000000021212121, 31 );
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  #-------------------------------------------------------------
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  # Source/Destination tests
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  #-------------------------------------------------------------
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  TEST_IMM_SRC1_EQ_DEST( 17, srli, 0x01000000, 0x80000000, 7 );
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  #-------------------------------------------------------------
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  # Bypassing tests
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  #-------------------------------------------------------------
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  TEST_IMM_DEST_BYPASS( 18, 0, srli, 0x01000000, 0x80000000, 7  );
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  TEST_IMM_DEST_BYPASS( 19, 1, srli, 0x00020000, 0x80000000, 14 );
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  TEST_IMM_DEST_BYPASS( 20, 2, srli, 0x00000001, 0x80000001, 31 );
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  TEST_IMM_SRC1_BYPASS( 21, 0, srli, 0x01000000, 0x80000000, 7  );
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  TEST_IMM_SRC1_BYPASS( 22, 1, srli, 0x00020000, 0x80000000, 14 );
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  TEST_IMM_SRC1_BYPASS( 23, 2, srli, 0x00000001, 0x80000001, 31 );
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  TEST_IMM_ZEROSRC1( 24, srli, 0, 4 );
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  TEST_IMM_ZERODEST( 25, srli, 33, 10 );
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  TEST_PASSFAIL
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RVTEST_CODE_END
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  .data
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RV_COMPLIANCE_DATA_BEGIN
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test_res:
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    .fill 40, 4, -1
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RV_COMPLIANCE_DATA_END
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