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1 2 mballance
# RISC-V Compliance Test RV64I-SRLIW-01
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#
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# Copyright (c) 2018, Imperas Software Ltd.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#      * Redistributions of source code must retain the above copyright
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#        notice, this list of conditions and the following disclaimer.
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#      * Redistributions in binary form must reproduce the above copyright
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#        notice, this list of conditions and the following disclaimer in the
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#        documentation and/or other materials provided with the distribution.
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#      * Neither the name of the Imperas Software Ltd. nor the
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#        names of its contributors may be used to endorse or promote products
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#        derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Imperas Software Ltd. BE LIABLE FOR ANY
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# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Specification: RV64I Base Integer Instruction Set, Version 2.0
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# Description: Testing instruction SRLIW.
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#include "test_macros.h"
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#include "compliance_test.h"
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#include "compliance_io.h"
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RV_COMPLIANCE_RV32M
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RV_COMPLIANCE_CODE_BEGIN
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        RVTEST_IO_INIT
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        RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
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        RVTEST_IO_WRITE_STR("Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
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        # ---------------------------------------------------------------------------------------------
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        RVTEST_IO_WRITE_STR("# Test number 1 - corner cases\n")
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        # address for test results
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        la      x2, test_1_res
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        TEST_IMM_OP(srliw, x3, x4, 0, 0x0, 0x0, x2, 0)
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        TEST_IMM_OP(srliw, x8, x9, 0, 0x0, 0x1, x2, 8)
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        TEST_IMM_OP(srliw, x11, x12, 0, 0x0, 0xf, x2, 16)
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        TEST_IMM_OP(srliw, x13, x14, 0, 0x0, 0x10, x2, 24)
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        TEST_IMM_OP(srliw, x15, x16, 0, 0x0, 0x1f, x2, 32)
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        # ---------------------------------------------------------------------------------------------
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        RVTEST_IO_WRITE_STR("# Test number 2 - corner cases\n")
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        # address for test results
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        la      x2, test_2_res
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        TEST_IMM_OP(srliw, x17, x18, 0x1, 0x1, 0x0, x2, 0)
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        TEST_IMM_OP(srliw, x19, x20, 0, 0x1, 0x1, x2, 8)
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        TEST_IMM_OP(srliw, x21, x22, 0, 0x1, 0xf, x2, 16)
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        TEST_IMM_OP(srliw, x23, x24, 0, 0x1, 0x10, x2, 24)
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        TEST_IMM_OP(srliw, x25, x26, 0, 0x1, 0x1f, x2, 32)
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        # ---------------------------------------------------------------------------------------------
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        RVTEST_IO_WRITE_STR("# Test number 3 - corner cases\n")
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        # address for test results
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        la      x2, test_3_res
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        TEST_IMM_OP(srliw, x27, x28, 0xffffffffffffffff, -0x1, 0x0, x2, 0)
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        TEST_IMM_OP(srliw, x29, x30, 0x7fffffff, -0x1, 0x1, x2, 8)
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        TEST_IMM_OP(srliw, x31, x3, 0x1ffff, -0x1, 0xf, x2, 16)
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        TEST_IMM_OP(srliw, x4, x8, 0xffff, -0x1, 0x10, x2, 24)
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        TEST_IMM_OP(srliw, x9, x11, 0x1, -0x1, 0x1f, x2, 32)
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        # ---------------------------------------------------------------------------------------------
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        RVTEST_IO_WRITE_STR("# Test number 4 - corner cases\n")
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        # address for test results
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        la      x2, test_4_res
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        TEST_IMM_OP(srliw, x12, x13, 0xffffffffffffffff, 0x7fffffffffffffff, 0x0, x2, 0)
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        TEST_IMM_OP(srliw, x14, x15, 0x7fffffff, 0x7fffffffffffffff, 0x1, x2, 8)
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        TEST_IMM_OP(srliw, x16, x17, 0x1ffff, 0x7fffffffffffffff, 0xf, x2, 16)
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        TEST_IMM_OP(srliw, x18, x19, 0xffff, 0x7fffffffffffffff, 0x10, x2, 24)
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        TEST_IMM_OP(srliw, x20, x21, 0x1, 0x7fffffffffffffff, 0x1f, x2, 32)
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        # ---------------------------------------------------------------------------------------------
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        RVTEST_IO_WRITE_STR("# Test number 5 - corner cases\n")
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        # address for test results
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        la      x2, test_5_res
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        TEST_IMM_OP(srliw, x22, x23, 0, 0x8000000000000000, 0x0, x2, 0)
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        TEST_IMM_OP(srliw, x24, x25, 0, 0x8000000000000000, 0x1, x2, 8)
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        TEST_IMM_OP(srliw, x26, x27, 0, 0x8000000000000000, 0xf, x2, 16)
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        TEST_IMM_OP(srliw, x28, x29, 0, 0x8000000000000000, 0x10, x2, 24)
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        TEST_IMM_OP(srliw, x30, x31, 0, 0x8000000000000000, 0x1f, x2, 32)
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        RVTEST_IO_WRITE_STR("Test End\n")
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        # ---------------------------------------------------------------------------------------------
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        RV_COMPLIANCE_HALT
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RV_COMPLIANCE_CODE_END
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# Input data section.
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        .data
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# Output data section.
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RV_COMPLIANCE_DATA_BEGIN
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test_1_res:
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        .fill 5, 8, -1
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test_2_res:
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        .fill 5, 8, -1
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test_3_res:
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        .fill 5, 8, -1
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test_4_res:
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        .fill 5, 8, -1
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test_5_res:
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        .fill 5, 8, -1
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test_6_res:
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        .fill 5, 8, -1
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test_7_res:
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        .fill 5, 8, -1
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test_8_res:
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        .fill 5, 8, -1
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test_9_res:
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        .fill 5, 8, -1
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test_10_res:
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        .fill 5, 8, -1
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RV_COMPLIANCE_DATA_END

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