Subversion Repositories g729a_codec

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05-Jan-2015

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This is third release of G.729A codec core version 1.0.

This release is intended to fix an error in the ASIP assembly

code detected by OVERFLOW test.

Modified source files:

G729A_asip_romi_pkg.vhd

Datasheet in DOCS folder has been added a new "C" appendix

providing some synthesis and implentation hints.

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15-Feb-2014

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This is second release of G.729A codec core version 1.0.

This release is intended to fix an issue occuring when the core

is synthesized using Xilinx tools and to clean up some code

imperfection.

Modified source files:

G729A_asip_addsub_pipeb.vhd

G729A_asip_cpu_2w_p6.vhd

G729A_asip_mulu_pipeb.vhd

G729A_asip_regfile_16x16_2w.vhd

G729A_asip_spc.vhd

G729A_asip_top_2w.vhd

G729A_codec_selftest.vhd

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02-Nov-2013

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This is first release of G.729A codec core version 1.0.

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Release directory structure:

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G729A_CODEC_V1_0

|

+--> DOCS (core datasheet)

|

+--> MISC (*)

|

+--> SIM

|    |

|    +--> MODELSIM (self-test simulation script)

|

+--> SYN

|    |

|    +--> ALTERA (self-test module synthesis script)

|    |

|    +--> XILINX (self-test module synthesis script)

|

+--> VHDL (core source files)

Additional info about design data in the current release can

be found in README.txt files included in sub-directories.

(*) This directory currently hold an archived version

of self-test module Quartus II project.