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[/] [gamepads/] [trunk/] [snespad/] [bench/] [vhdl/] [tb.vhd] - Blame information for rev 41

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1 3 arniml
-------------------------------------------------------------------------------
2
--
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-- Testbench for the
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-- SNESpad controller core
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--
6 41 arniml
-- $Id: tb.vhd 41 2009-04-01 19:58:04Z arniml $
7 3 arniml
--
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-- Copyright (c) 2004, Arnim Laeuger (arniml@opencores.org)
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--
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-- All rights reserved
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--
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-- Redistribution and use in source and synthezised forms, with or without
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-- modification, are permitted provided that the following conditions are met:
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--
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-- Redistributions of source code must retain the above copyright notice,
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-- this list of conditions and the following disclaimer.
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--
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-- Redistributions in synthesized form must reproduce the above copyright
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-- notice, this list of conditions and the following disclaimer in the
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-- documentation and/or other materials provided with the distribution.
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--
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-- Neither the name of the author nor the names of other contributors may
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-- be used to endorse or promote products derived from this software without
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-- specific prior written permission.
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--
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-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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-- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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-- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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-- PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE
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-- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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-- INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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-- CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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-- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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-- POSSIBILITY OF SUCH DAMAGE.
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--
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-- Please report bugs to the author, but before you do so, please
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-- make sure that this is not a derivative work and that
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-- you have the latest version of this file.
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--
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-- The latest version of this file can be found at:
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--      http://www.opencores.org/cvsweb.shtml/gamepads/
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--
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-- The project homepage is located at:
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--      http://www.opencores.org/projects.cgi/web/gamepads/overview
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--
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-------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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entity tb is
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end tb;
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use work.snespad_pack.all;
59 5 arniml
use work.snespad_comp.snespad;
60 3 arniml
 
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architecture behav of tb is
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  constant period_c       : time    := 100 ns;
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  constant num_pads_c     : natural := 2;
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  constant reset_level_c  : natural := 0;
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  constant button_level_c : natural := 0;
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  signal clk_s   : std_logic;
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  signal reset_s : std_logic;
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  signal pad_clk_s   : std_logic;
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  signal pad_latch_s : std_logic;
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  signal pad_data_s  : std_logic_vector(num_pads_c-1 downto 0);
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  type buttons_t is array (11 downto 0) of std_logic_vector(num_pads_c-1 downto 0);
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  signal buttons_s : buttons_t;
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  signal buttons0_s,
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         buttons1_s  : std_logic_vector(11 downto 0);
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begin
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  dut : snespad
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    generic map (
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      num_pads_g       => 2,
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      reset_level_g    => reset_level_c,
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      button_level_g   => button_level_c,
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      clocks_per_6us_g => 60
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    )
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    port map (
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      clk_i            => clk_s,
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      reset_i          => reset_s,
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      pad_clk_o        => pad_clk_s,
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      pad_latch_o      => pad_latch_s,
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      pad_data_i       => pad_data_s,
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      but_a_o          => buttons_s(but_pos_a_c),
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      but_b_o          => buttons_s(but_pos_b_c),
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      but_x_o          => buttons_s(but_pos_x_c),
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      but_y_o          => buttons_s(but_pos_y_c),
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      but_start_o      => buttons_s(but_pos_start_c),
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      but_sel_o        => buttons_s(but_pos_sel_c),
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      but_tl_o         => buttons_s(but_pos_tl_c),
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      but_tr_o         => buttons_s(but_pos_tr_c),
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      but_up_o         => buttons_s(but_pos_up_c),
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      but_down_o       => buttons_s(but_pos_down_c),
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      but_left_o       => buttons_s(but_pos_left_c),
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      but_right_o      => buttons_s(but_pos_right_c)
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    );
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  buttons: process (buttons_s)
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  begin
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    for i in 0 to 11 loop
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      buttons0_s(i) <= buttons_s(i)(0);
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      buttons1_s(i) <= buttons_s(i)(1);
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    end loop;
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  end process buttons;
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  -----------------------------------------------------------------------------
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  -- DUT Stimuli
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  -----------------------------------------------------------------------------
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  stimuli: process
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    procedure dispatch(pad : in natural;
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                       packet : in std_logic_vector(11 downto 0)) is
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    begin
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      wait until pad_latch_s = '0';
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      for i in 11 downto 0 loop
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        wait until pad_clk_s = '0';
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        pad_data_s(pad) <= packet(i);
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        wait until pad_clk_s = '1';
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      end loop;
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      wait for period_c;
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      assert pad_latch_s = '1'
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        report "Latch not deasserted!"
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        severity error;
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      wait for period_c;
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      for i in 11 downto 0 loop
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        assert button_active_f(buttons_s(i)(pad), button_level_c) = packet(i)
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          report "Mismatch for received vs. sent buttons!"
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          severity error;
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      end loop;
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    end dispatch;
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  begin
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    pad_data_s <= (others => '1');
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    wait until reset_s = '1';
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    wait for period_c * 4;
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    for pad in 0 to 1 loop
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      dispatch(pad, packet => "000000000000");
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      dispatch(pad, packet => "111111111111");
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      dispatch(pad, packet => "010101010101");
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      dispatch(pad, packet => "101010101010");
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      dispatch(pad, packet => "100000000000");
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      dispatch(pad, packet => "010000000000");
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      dispatch(pad, packet => "001000000000");
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      dispatch(pad, packet => "000100000000");
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      dispatch(pad, packet => "000010000000");
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      dispatch(pad, packet => "000001000000");
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      dispatch(pad, packet => "000000100000");
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      dispatch(pad, packet => "000000010000");
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      dispatch(pad, packet => "000000001000");
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      dispatch(pad, packet => "000000000100");
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      dispatch(pad, packet => "000000000010");
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      dispatch(pad, packet => "000000000001");
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    end loop;
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    wait for period_c * 4;
178
    assert false
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      report "End of simulation reached."
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      severity failure;
181
 
182
  end process stimuli;
183
 
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  -----------------------------------------------------------------------------
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  -- Clock Generator
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  -----------------------------------------------------------------------------
188
  clk: process
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  begin
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    clk_s <= '0';
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    wait for period_c / 2;
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    clk_s <= '1';
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    wait for period_c / 2;
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  end process clk;
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  -----------------------------------------------------------------------------
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  -- Reset Generator
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  -----------------------------------------------------------------------------
200
  reset: process
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  begin
202
    if reset_level_c = 0 then
203
      reset_s <= '0';
204
    else
205
      reset_s <= '1';
206
    end if;
207
 
208
    wait for period_c * 4 + 10 ns;
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210
    reset_s <= not reset_s;
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212
    wait;
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  end process reset;
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end behav;

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