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[/] [generic_booth_multipler/] [trunk/] [rtl/] [modules/] [00.LeftShiftReg.vhd] - Blame information for rev 6

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1 2 alimpk
 
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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entity LeftShiftReg is
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                generic(
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                        size : integer:= 4
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                );
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                port(
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                        clock    :in    std_logic;
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                        enable :in      std_logic;
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                        shift    :in    std_logic;
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                        din      :in    std_logic_vector(size-1 downto 0);
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                        dout     :out std_logic_vector(size-1 downto 0));
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end LeftShiftReg;
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architecture Behavioral of LeftShiftReg is
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        signal data : std_logic_vector(din'range);
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begin
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        process(clock, enable, shift)
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        begin
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                if(clock'event and clock = '1')then
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                        if(enable = '1')then
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                                data <= din;
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                        elsif(shift = '1') then
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                                data <= data(din'length-2 downto 0) & '0';
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                        else
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                                data <= data;
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                        end if;
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                end if;
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        end process;
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        dout <= data;
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end Behavioral;
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