OpenCores
URL https://opencores.org/ocsvn/hasm/hasm/trunk

Subversion Repositories hasm

[/] [hasm/] [web_uploads/] [example.hsm] - Blame information for rev 6

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 6 root
---------------------------------------------------
2
-- HASM Example File
3
---------------------------------------------------
4
.equ fpgabase      0xa0000000;
5
.equ membase       0x80000000;
6
.equ memfaultcount 0xa0000010;
7
 
8
.isr isr_handler;
9
 
10
 
11
 
12
start:
13
   call mem_test;
14
 
15
 
16
stophere:
17
    jmp stophere;
18
 
19
 
20
 
21
 
22
---------------------------------------------------
23
-- mem_test shows how to implement a simple memory
24
-- test in hasm.
25
---------------------------------------------------
26
mem_test:
27
   ld rega,membase;         -- Base address of memory
28
   ld regc,0x0;             -- Loop count
29
mem_write:
30
 
31
   ld regb,0x5a5a5a5a;      -- Test pattern A
32
   wr rega,regb;            -- Write rega to address pointed to by regb
33
   add rega,0x04;           -- Bump mem pointer
34
 
35
   ld regb,0xa5a5a5a5;      -- Test pattern B
36
   wr rega,regb;            -- Write rega to address pointed to by regb
37
   add rega,0x04;           -- Bump mem pointer
38
 
39
   add regc,0x01;           -- Bump loop count
40
   cmp_e regc,0x100;        -- Done writing?
41
   jmp mem_write;           -- No, keep going
42
 
43
   ld rega,membase;         -- Finished writing so reinit for a read
44
   ld regc,0x0;             -- Reinit the loop pointer
45
mem_verify:
46
   rd regb,rega;            -- Read back first location
47
   cmp_e regb,0x5a5a5a5a;   -- First value ok?
48
   call mem_fault;          -- Values didn't match so call fault handler
49
   add rega,0x4;            -- Bump the address pointer
50
   rd regb,rega;            -- Get the next value
51
   cmp_e regb,0xa5a5a5a5;   -- Check against second patter
52
   call mem_fault;          -- Didn't match, call the handler
53
   add regc,0x1;            -- Bump the iteration count
54
   cmp_e regc,0x100;        -- Done yet?
55
   jmp mem_verify;          -- No, keep going
56
   ret;                     -- Yep return
57
 
58
 
59
 
60
---------------------------------------------------
61
-- mem_fault is responsible for incrementing the
62
-- fault count stored in the FPGA.
63
---------------------------------------------------
64
mem_fault:
65
   push rega;               -- Save rega
66
   rd rega,memfaultcount;   -- Get the fault count
67
   add rega,0x1;            -- Increment the fault count
68
   wr rega,memfaultcount;   -- Write the fault count back
69
   pop rega;                -- Restore rega
70
   ret;                     -- Return to caller
71
 
72
---------------------------------------------------
73
-- isr_handler gets called when then the
74
-- machine_interrupt input to the cycle_simulator
75
-- file is brought high.
76
---------------------------------------------------
77
isr_handler:
78
   push regd;
79
   pop regd;
80
   ret;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.