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kavi |
----==============================================================----
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---- ----
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---- Filename: prenc_loops5.vhd ----
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---- Module description: Priority encoder unit. Obtains ----
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---- increment and reset decisions for the loop indices. ----
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---- ----
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---- Author: Nikolaos Kavvadias ----
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---- nkavv@physics.auth.gr ----
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---- ----
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---- ----
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---- Part of the hwlu OPENCORES project generated automatically ----
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---- with the use of the "gen_priority_encoder" tool ----
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---- ----
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---- To Do: ----
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---- Considered stable for the time being ----
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---- ----
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---- Author: Nikolaos Kavvadias ----
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---- nkavv@physics.auth.gr ----
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---- ----
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----==============================================================----
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---- ----
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---- Copyright (C) 2004-2010 Nikolaos Kavvadias ----
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---- nkavv@uop.gr ----
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---- nkavv@physics.auth.gr ----
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---- nikolaos.kavvadias@gmail.com ----
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---- ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- and/or modify it under the terms of the GNU Lesser General ----
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---- Public License as published by the Free Software Foundation; ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- later version. ----
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---- ----
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---- This source is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- details. ----
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---- ----
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---- You should have received a copy of the GNU Lesser General ----
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---- Public License along with this source; if not, download it ----
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---- from <http://www.opencores.org/lgpl.shtml> ----
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---- ----
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----==============================================================----
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--
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-- CVS Revision History
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--
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.std_logic_unsigned.all;
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entity priority_encoder is
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generic (
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NLP : integer := 5
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);
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port (
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flag : in std_logic_vector(NLP-1 downto 0);
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task_loop5_end : in std_logic;
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incl : out std_logic_vector(NLP-1 downto 0);
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reset_vct : out std_logic_vector(NLP-1 downto 0);
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loops_end : out std_logic
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);
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end priority_encoder;
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architecture rtl of priority_encoder is
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begin
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-- Fully-nested loop structure with 5 loops
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-- From outer to inner: 4-> 3-> 2-> 1-> 0
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process (flag, task_loop5_end)
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begin
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--
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-- if loop4 is terminating:
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-- reset loops 4-0 to initial index
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if (flag(4 downto 0) = "11111") then
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incl <= "00000";
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reset_vct <= "11111";
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loops_end <= '1';
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-- else if loop3 is terminating:
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-- 1. increment loop4 index
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-- 2. reset loop3 to initial index
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elsif (flag(3 downto 0) = "1111") then
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incl <= "10000";
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reset_vct <= "01111";
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loops_end <= '0';
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-- else if loop2 is terminating:
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-- 1. increment loop3 index
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-- 2. reset loop2 to initial index
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elsif (flag(2 downto 0) = "111") then
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incl <= "01000";
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reset_vct <= "00111";
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loops_end <= '0';
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-- else if loop1 is terminating:
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-- 1. increment loop2 index
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-- 2. reset loop1 to initial index
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elsif (flag(1 downto 0) = "11") then
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incl <= "00100";
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reset_vct <= "00011";
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loops_end <= '0';
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-- else if loop0 is terminating:
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-- 1. increment loop1 index
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-- 2. reset loop0 to initial index
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elsif (flag(0 downto 0) = "1") then
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incl <= "00010";
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reset_vct <= "00001";
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loops_end <= '0';
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-- else increment loop-1 index
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else
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reset_vct <= "00000";
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loops_end <= '0';
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if (task_loop5_end = '1') then
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incl <= "00001";
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else
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incl <= "00000";
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end if;
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end if;
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end process;
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end rtl;
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