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[/] [i2c/] [trunk/] [rtl/] [vhdl/] [tst_ds1621.vhd] - Blame information for rev 68

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--
--
-- State machine for reading data from Dallas 1621
--
-- Testsystem for i2c controller
--
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
 
use work.i2c.all;
 
entity DS1621_interface is
        port (
                clk : in std_logic;
                nReset : in std_logic;
 
                Dout : out std_logic_vector(7 downto 0); -- data read from ds1621
 
                error : out std_logic; -- no correct ack received
 
                SCL : inout std_logic;
                SDA : inout std_logic
        );
end entity DS1621_interface;
 
architecture structural of DS1621_interface is
        constant SLAVE_ADDR : std_logic_vector(6 downto 0) := "1001000";
        constant CLK_CNT : unsigned(7 downto 0) := conv_unsigned(20, 8);
 
        signal cmd_ack : std_logic;
        signal D : std_logic_vector(7 downto 0);
        signal lack, store_dout : std_logic;
 
        signal start, read, write, ack, stop : std_logic;
        signal i2c_dout : std_logic_vector(7 downto 0);
 
begin
        -- hookup I2C controller
        u1: simple_i2c port map (clk => clk, ena => '1', clk_cnt => clk_cnt, nReset => nReset,
                        read => read, write => write, start => start, stop => stop, ack_in => ack, cmd_ack => cmd_ack,
                        Din => D, Dout => i2c_dout, ack_out => lack, SCL => SCL, SDA => SDA);
 
        init_statemachine : block
                type states is (i1, i2, i3, i4, i5, t1, t2, t3, t4, t5);
                signal state : states;
        begin
                nxt_state_decoder: process(clk, nReset, state)
                        variable nxt_state : states;
                        variable iD : std_logic_vector(7 downto 0);
                        variable ierr : std_logic;
                        variable istart, iread, iwrite, iack, istop : std_logic;
                        variable istore_dout : std_logic;
                begin
                        nxt_state := state;
                        ierr := '0';
                        istore_dout := '0';
 
                        istart := start;
                        iread := read;
                        iwrite := write;
                        iack := ack;
                        istop := stop;
                        iD := D;
 
                        case (state) is
                                -- init DS1621
                                -- 1) send start condition
                                -- 2) send slave address + write
                                -- 3) check ack
                                -- 4) send "access config" command (0xAC)
                                -- 5) check ack
                                -- 6) send config register data (0x00)
                                -- 7) check ack
                                -- 8) send stop condition
                                -- 9) send start condition
                                -- 10) send slave address + write
                                -- 11) check ack
                                -- 12) send "start conversion" command (0xEE)
                                -- 13) check ack
                                -- 14) send stop condition
 
                                when i1 =>      -- send start condition, sent slave address + write
                                        nxt_state := i2;
                                        istart := '1';
                                        iread := '0';
                                        iwrite := '1';
                                        iack := '0';
                                        istop := '0';
                                        iD := (slave_addr & '0'); -- write to slave (R/W = '0')
 
                                when i2 =>      -- send "access config" command
                                        if (cmd_ack = '1') then
                                                nxt_state := i3;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received from last command, expected ACK
                                                end if;
 
                                                istart := '0';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '0';
                                                iD := x"AC";
                                        end if;
 
                                when i3 =>      -- send config register data, sent stop condition
                                        if (cmd_ack = '1') then
                                                nxt_state := i4;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received from last command, expected ACK
                                                end if;
 
                                                istart := '0';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '1';
                                                iD := x"00";
                                        end if;
 
                                when i4 =>      -- send start condition, sent slave address + write
                                        if (cmd_ack = '1') then
                                                nxt_state := i5;
 
                                                istart := '1';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '0';
                                                iD := (slave_addr & '0'); -- write to slave (R/W = '0')
                                        end if;
 
                                when i5 =>      -- send "start conversion" command + stop condition
                                        if (cmd_ack = '1') then
                                                nxt_state := t1;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received from last command, expected ACK
                                                end if;
 
                                                istart := '0';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '1';
                                                iD := x"EE";
                                        end if;
                                -- read temperature
                                -- 1) sent start condition
                                -- 2) sent slave address + write
                                -- 3) check ack
                                -- 4) sent "read temperature" command (0xAA)
                                -- 5) check ack
                                -- 6) sent start condition
                                -- 7) sent slave address + read
                                -- 8) check ack
                                -- 9) read msb
                                -- 10) send ack
                                -- 11) read lsb
                                -- 12) send nack
                                -- 13) send stop condition
 
                                when t1 =>      -- send start condition, sent slave address + write
                                        if (cmd_ack = '1') then
                                                nxt_state := t2;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received from last command, expected ACK
                                                end if;
 
                                                istart := '1';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '0';
                                                iD := (slave_addr & '0'); -- write to slave (R/W = '0')
                                        end if;
 
                                when t2 =>      -- send read temperature command
                                        if (cmd_ack = '1') then
                                                nxt_state := t3;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received from last command, expected ACK
                                                end if;
 
                                                istart := '0';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '0';
                                                iD := x"AA";
                                        end if;
 
                                when t3 =>      -- send (repeated) start condition, send slave address + read
                                        if (cmd_ack = '1') then
                                                nxt_state := t4;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received, expected ACK
                                                end if;
 
                                                istart := '1';
                                                iread := '0';
                                                iwrite := '1';
                                                iack := '0';
                                                istop := '0';
                                                iD := (slave_addr & '1'); -- read from slave (R/W = '1')
                                        end if;
 
                                when t4 =>      -- read MSB (hi-byte), send acknowledge
                                        if (cmd_ack = '1') then
                                                nxt_state := t5;
                                                -- check aknowledge bit
                                                if (lack = '1') then
                                                        ierr := '1'; -- no acknowledge received from last command, expected ACK
                                                end if;
 
                                                istart := '0';
                                                iread := '1';
                                                iwrite := '0';
                                                iack := '0'; --ACK
                                                istop := '0';
                                        end if;
 
                                when t5 =>      -- read LSB (lo-byte), send acknowledge, sent stop
                                        if (cmd_ack = '1') then
                                                nxt_state := t1;
 
                                                istart := '0';
                                                iread := '1';
                                                iwrite := '0';
                                                iack := '1'; --NACK
                                                istop := '1';
 
                                                istore_dout := '1';
                                        end if;
                        end case;
 
                        -- genregs
                        if (nReset = '0') then
                                state <= i1;
                                error <= '0';
                                store_dout <= '0';
 
                                start <= '0';
                                read <= '0';
                                write <= '0';
                                ack <= '0';
                                stop <= '0';
                                D <= (others => '0');
                        elsif (clk'event and clk = '1') then
                                state <= nxt_state;
                                error <= ierr;
                                store_dout <= istore_dout;
 
                                start <= istart;
                                read <= iread;
                                write <= iwrite;
                                ack <= iack;
                                stop <= istop;
                                D <= iD;
                        end if;
                end process nxt_state_decoder;
        end block init_statemachine;
 
        -- store temp
        gen_dout : process(clk)
        begin
                if (clk'event and clk = '1') then
                        if (store_dout = '1') then
                                Dout <= i2c_dout;
                        end if;
                end if;
        end process gen_dout;
 
end architecture structural;
 
 

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[/] [i2c/] [trunk/] [rtl/] [vhdl/] [tst_ds1621.vhd] - Blame information for rev 68

Line No.	Rev	Author	Line
1	10	rherveille	`--`
2			`--`
3			`-- State machine for reading data from Dallas 1621`
4			`--`
5			`-- Testsystem for i2c controller`
6			`--`
7			`--`
8			`library ieee;`
9			`use ieee.std_logic_1164.all;`
10			`use ieee.std_logic_arith.all;`
11
12			`use work.i2c.all;`
13
14			`entity DS1621_interface is`
15			`port (`
16			`clk : in std_logic;`
17			`nReset : in std_logic;`
18
19			`Dout : out std_logic_vector(7 downto 0); -- data read from ds1621`
20
21			`error : out std_logic; -- no correct ack received`
22
23			`SCL : inout std_logic;`
24			`SDA : inout std_logic`
25			`);`
26			`end entity DS1621_interface;`
27
28			`architecture structural of DS1621_interface is`
29			`constant SLAVE_ADDR : std_logic_vector(6 downto 0) := "1001000";`
30			`constant CLK_CNT : unsigned(7 downto 0) := conv_unsigned(20, 8);`
31
32			`signal cmd_ack : std_logic;`
33			`signal D : std_logic_vector(7 downto 0);`
34			`signal lack, store_dout : std_logic;`
35
36			`signal start, read, write, ack, stop : std_logic;`
37			`signal i2c_dout : std_logic_vector(7 downto 0);`
38
39			`begin`
40			`-- hookup I2C controller`
41			`u1: simple_i2c port map (clk => clk, ena => '1', clk_cnt => clk_cnt, nReset => nReset,`
42			`read => read, write => write, start => start, stop => stop, ack_in => ack, cmd_ack => cmd_ack,`
43			`Din => D, Dout => i2c_dout, ack_out => lack, SCL => SCL, SDA => SDA);`
44
45			`init_statemachine : block`
46			`type states is (i1, i2, i3, i4, i5, t1, t2, t3, t4, t5);`
47			`signal state : states;`
48			`begin`
49			`nxt_state_decoder: process(clk, nReset, state)`
50			`variable nxt_state : states;`
51			`variable iD : std_logic_vector(7 downto 0);`
52			`variable ierr : std_logic;`
53			`variable istart, iread, iwrite, iack, istop : std_logic;`
54			`variable istore_dout : std_logic;`
55			`begin`
56			`nxt_state := state;`
57			`ierr := '0';`
58			`istore_dout := '0';`
59
60			`istart := start;`
61			`iread := read;`
62			`iwrite := write;`
63			`iack := ack;`
64			`istop := stop;`
65			`iD := D;`
66
67			`case (state) is`
68			`-- init DS1621`
69			`-- 1) send start condition`
70			`-- 2) send slave address + write`
71			`-- 3) check ack`
72			`-- 4) send "access config" command (0xAC)`
73			`-- 5) check ack`
74			`-- 6) send config register data (0x00)`
75			`-- 7) check ack`
76			`-- 8) send stop condition`
77			`-- 9) send start condition`
78			`-- 10) send slave address + write`
79			`-- 11) check ack`
80			`-- 12) send "start conversion" command (0xEE)`
81			`-- 13) check ack`
82			`-- 14) send stop condition`
83
84			`when i1 => -- send start condition, sent slave address + write`
85			`nxt_state := i2;`
86			`istart := '1';`
87			`iread := '0';`
88			`iwrite := '1';`
89			`iack := '0';`
90			`istop := '0';`
91			`iD := (slave_addr & '0'); -- write to slave (R/W = '0')`
92
93			`when i2 => -- send "access config" command`
94			`if (cmd_ack = '1') then`
95			`nxt_state := i3;`
96			`-- check aknowledge bit`
97			`if (lack = '1') then`
98			`ierr := '1'; -- no acknowledge received from last command, expected ACK`
99			`end if;`
100
101			`istart := '0';`
102			`iread := '0';`
103			`iwrite := '1';`
104			`iack := '0';`
105			`istop := '0';`
106			`iD := x"AC";`
107			`end if;`
108
109			`when i3 => -- send config register data, sent stop condition`
110			`if (cmd_ack = '1') then`
111			`nxt_state := i4;`
112			`-- check aknowledge bit`
113			`if (lack = '1') then`
114			`ierr := '1'; -- no acknowledge received from last command, expected ACK`
115			`end if;`
116
117			`istart := '0';`
118			`iread := '0';`
119			`iwrite := '1';`
120			`iack := '0';`
121			`istop := '1';`
122			`iD := x"00";`
123			`end if;`
124
125			`when i4 => -- send start condition, sent slave address + write`
126			`if (cmd_ack = '1') then`
127			`nxt_state := i5;`
128
129			`istart := '1';`
130			`iread := '0';`
131			`iwrite := '1';`
132			`iack := '0';`
133			`istop := '0';`
134			`iD := (slave_addr & '0'); -- write to slave (R/W = '0')`
135			`end if;`
136
137			`when i5 => -- send "start conversion" command + stop condition`
138			`if (cmd_ack = '1') then`
139			`nxt_state := t1;`
140			`-- check aknowledge bit`
141			`if (lack = '1') then`
142			`ierr := '1'; -- no acknowledge received from last command, expected ACK`
143			`end if;`
144
145			`istart := '0';`
146			`iread := '0';`
147			`iwrite := '1';`
148			`iack := '0';`
149			`istop := '1';`
150			`iD := x"EE";`
151			`end if;`
152			`-- read temperature`
153			`-- 1) sent start condition`
154			`-- 2) sent slave address + write`
155			`-- 3) check ack`
156			`-- 4) sent "read temperature" command (0xAA)`
157			`-- 5) check ack`
158			`-- 6) sent start condition`
159			`-- 7) sent slave address + read`
160			`-- 8) check ack`
161			`-- 9) read msb`
162			`-- 10) send ack`
163			`-- 11) read lsb`
164			`-- 12) send nack`
165			`-- 13) send stop condition`
166
167			`when t1 => -- send start condition, sent slave address + write`
168			`if (cmd_ack = '1') then`
169			`nxt_state := t2;`
170			`-- check aknowledge bit`
171			`if (lack = '1') then`
172			`ierr := '1'; -- no acknowledge received from last command, expected ACK`
173			`end if;`
174
175			`istart := '1';`
176			`iread := '0';`
177			`iwrite := '1';`
178			`iack := '0';`
179			`istop := '0';`
180			`iD := (slave_addr & '0'); -- write to slave (R/W = '0')`
181			`end if;`
182
183			`when t2 => -- send read temperature command`
184			`if (cmd_ack = '1') then`
185			`nxt_state := t3;`
186			`-- check aknowledge bit`
187			`if (lack = '1') then`
188			`ierr := '1'; -- no acknowledge received from last command, expected ACK`
189			`end if;`
190
191			`istart := '0';`
192			`iread := '0';`
193			`iwrite := '1';`
194			`iack := '0';`
195			`istop := '0';`
196			`iD := x"AA";`
197			`end if;`
198
199			`when t3 => -- send (repeated) start condition, send slave address + read`
200			`if (cmd_ack = '1') then`
201			`nxt_state := t4;`
202			`-- check aknowledge bit`
203			`if (lack = '1') then`
204			`ierr := '1'; -- no acknowledge received, expected ACK`
205			`end if;`
206
207			`istart := '1';`
208			`iread := '0';`
209			`iwrite := '1';`
210			`iack := '0';`
211			`istop := '0';`
212			`iD := (slave_addr & '1'); -- read from slave (R/W = '1')`
213			`end if;`
214
215			`when t4 => -- read MSB (hi-byte), send acknowledge`
216			`if (cmd_ack = '1') then`
217			`nxt_state := t5;`
218			`-- check aknowledge bit`
219			`if (lack = '1') then`
220			`ierr := '1'; -- no acknowledge received from last command, expected ACK`
221			`end if;`
222
223			`istart := '0';`
224			`iread := '1';`
225			`iwrite := '0';`
226			`iack := '0'; --ACK`
227			`istop := '0';`
228			`end if;`
229
230			`when t5 => -- read LSB (lo-byte), send acknowledge, sent stop`
231			`if (cmd_ack = '1') then`
232			`nxt_state := t1;`
233
234			`istart := '0';`
235			`iread := '1';`
236			`iwrite := '0';`
237			`iack := '1'; --NACK`
238			`istop := '1';`
239
240			`istore_dout := '1';`
241			`end if;`
242			`end case;`
243
244			`-- genregs`
245			`if (nReset = '0') then`
246			`state <= i1;`
247			`error <= '0';`
248			`store_dout <= '0';`
249
250			`start <= '0';`
251			`read <= '0';`
252			`write <= '0';`
253			`ack <= '0';`
254			`stop <= '0';`
255			`D <= (others => '0');`
256			`elsif (clk'event and clk = '1') then`
257			`state <= nxt_state;`
258			`error <= ierr;`
259			`store_dout <= istore_dout;`
260
261			`start <= istart;`
262			`read <= iread;`
263			`write <= iwrite;`
264			`ack <= iack;`
265			`stop <= istop;`
266			`D <= iD;`
267			`end if;`
268			`end process nxt_state_decoder;`
269			`end block init_statemachine;`
270
271			`-- store temp`
272			`gen_dout : process(clk)`
273			`begin`
274			`if (clk'event and clk = '1') then`
275			`if (store_dout = '1') then`
276			`Dout <= i2c_dout;`
277			`end if;`
278			`end if;`
279			`end process gen_dout;`
280
281			`end architecture structural;`
282
283