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[/] [lattice6502/] [ghdl/] [usrcode.asm] - Blame information for rev 7

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;
        cpu 6502
PAGE 40,120
;       ****************************************************************************************
;       This is intended to be the template for the user code                               ****
;       ****************************************************************************************
;       These flags are used for conditional assembly.
;       Just select the instructions to be tested.
shiftfg equ     0
intfg   equ     0
Xfg     equ     0
Yfg     equ     0
AddXfg  equ     0
AddYfg  equ     1
;       ********************************************************
 
return  equ     $fff6   ;jump to fcoo to return control and restart
sendtxt equ     $fff0
hex2txt equ     $fff3
irq     equ     $4002
nmi     equ     $4003
break   equ     $10
intrpt  equ     $04
 
*       =       $0010
point   dw      table2
        dw      table2 + 1
        dw      table2 + 2
        dw      table2 + 3
        dw      table2 + 4
        dw      table2 + 5
        dw      table2 + 6
        dw      table2 + 7
        dw      table2 + 8
;
table3  db      $00
bittbl1 db      $1,  $2,  $4,  $8,  $10, $20, $40, $80
nottbl1 db      $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f
 
*       =       $290    ;user code starts at $290
 
main    clc
        clv
        cli
 
IF      shiftfg
;       *****************************************************
;       Shift instruction to be tested follows
;       Table2 abs and abs,x
;       Table2 zero and zero,x
        ldy     #$a5
        ldx     #$03
        lda     #$5a
 
        sta     table2 + 3      ;ror and rol test
        lda     #$00
        clc
        rol     table2,x
        clc
        rol     table2 + 3
        sec
        rol     table2 + 3
        sec
        rol     table2,x
        lda     table2 + 3
 
        sta     table3 + 3      ;test asl lsr
        lda     #$00
        lsr     table3,x
        lsr     table3 + 3
        lsr     table3 + 3
        lsr     table3,x
        lda     table3 + 3
;       *****************************************************
        lsr     ;test all shift instruction implied
        lsr     ;ie shift reg_a
        lsr
        lsr
ENDC
 
;       *****************************************************
 
IF      intfg
;       *****************************************************
;       Testing of Interrupts
;       Comment in or out interrupt as required
        lda     #$fe
        sta     nmi
 
;       lda     #$fe
;       sta     irq
 
;       brk
;       ****************************************************
ENDC
 
IF      Xfg
;       *****************************************************
        ldx     #$03            ;lda & eor test with reg_x
        ldy     #1              ;First test zero and zero,x
        lda     bittbl1 + 3
        eor     bittbl1,x       ;should be 0
        bne     failtst
        ldy     #2
        lda     bittbl1,x
        eor     bittbl1 + 3
        bne     failtst
 
        ldx     #$04
        ldy     #3              ;then abs
        lda     bittbl2 + 4
        eor     bittbl2,x       ;should be 0
        bne     failtst
        ldy     #4
        lda     bittbl2,x
        eor     bittbl2 + 4
        bne     failtst
 
        ldy     #5              ;ora & and test with reg_x
        ldx     #$05            ;First test zero and zero,x
        ora     bittbl1 +5      ;set a bit
        and     nottbl1,x       ;clear it
        bne     failtst
        ldy     #6
        ora     bittbl1,x
        and     nottbl1 + 5
        bne     failtst
 
        ldy     #7              ;again using abs and abs,x
        ldx     #$05
        ora     bittbl2 + 5     ;set a bit
        and     nottbl2,x       ;clear it
        bne     failtst
        ldy     #8
        ora     bittbl2,x
        and     nottbl2 + 5
        bne     failtst
 
passx   lda     #"P"
        jsr     sendtxt
        lda     #"a"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #" "
        jsr     sendtxt
        lda     #"X"
        jsr     sendtxt
        lda     #"\r"
        jsr     sendtxt
 
        jmp     (return)
 
ENDC
;       *****************************************************
IF      Yfg
;       *****************************************************
        ldy     #$03            ;lda & eor test with reg_x
        ldx     #1              ;First test zero and zero,y
        lda     bittbl1 + 3
        eor     bittbl1,y       ;should be 0
        bne     failtst
        ldx     #2
        lda     bittbl1,y
        eor     bittbl1 + 3
        bne     failtst
 
        ldy     #$04
        ldx     #3              ;then abs
        lda     bittbl2 + 4
        eor     bittbl2,y       ;should be 0
        bne     failtst
        ldx     #4
        lda     bittbl2,y
        eor     bittbl2 + 4
        bne     failtst
 
        ldx     #5              ;ora & and test with reg_x
        ldy     #$05            ;First test zero and zero,y
        ora     bittbl1 +5      ;set a bit
        and     nottbl1,y       ;clear it
        bne     failtst
        ldx     #6
        ora     bittbl1,y
        and     nottbl1 + 5
        bne     failtst
 
        ldx     #7              ;again using abs and abs,y
        ldy     #$05
        ora     bittbl2 + 5     ;set a bit
        and     nottbl2,y       ;clear it
        bne     failtst
        ldx     #8
        ora     bittbl2,y
        and     nottbl2 + 5
        bne     failtst
 
passy   lda     #"P"
        jsr     sendtxt
        lda     #"a"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #" "
        jsr     sendtxt
        lda     #"Y"
        jsr     sendtxt
        lda     #"\r"
        jsr     sendtxt
 
        jmp     (return)
 
ENDC
;       *****************************************************
 
IF      AddXfg
;       *****************************************************
        ldx     #$03            ;adc & sbc test with reg_x
        ldy     #1              ;First test zero & zero,x
        clc
        lda     #0
        adc     bittbl1 + 3
        sbc     bittbl1,x       ;should be 0
        bne     failtst
        ldy     #2
        clc
        lda     #0
        adc     bittbl1,x
        sbc     bittbl1 + 3
        bne     failtst
 
        ldx     #$04
        ldy     #3              ;then abs
        clc
        lda     #0
        adc     bittbl2 + 4
        sbc     bittbl2,x       ;should be 0
        bne     failtst
        ldy     #4
        clc
        lda     #0
        adc     bittbl2,x
        sbc     bittbl2 + 4
        bne     failtst
 
        ldy     #5              ;ora & cmp test with reg_x
        ldx     #$05            ;First test zero & zero,x
        ora     bittbl1 +5      ;set a bit
        cmp     bittbl1,x       ;clear it
        bne     failtst
        ldy     #6
        ora     bittbl1,x
        cmp     bittbl1 + 5
        bne     failtst
 
        ldy     #7              ;again using abs cmp abs,x
        ldx     #$05
        ora     bittbl2 + 5     ;set a bit
        cmp     bittbl2,x       ;clear it
        bne     failtst
        ldy     #8
        ora     bittbl2,x
        cmp     bittbl2 + 5
        bne     failtst
 
passx   lda     #"P"
        jsr     sendtxt
        lda     #"a"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #" "
        jsr     sendtxt
        lda     #"A"
        jsr     sendtxt
        lda     #"\r"
        jsr     sendtxt
 
        jmp     (return)
ENDC
 
IF      AddYfg
;       *****************************************************
        ldy     #$03            ;adc & sbc test with reg_x
        ldx     #1              ;First test zero & zero,y
        clc
        lda     #0
        adc     bittbl1 + 3
        sbc     bittbl1,y       ;should be 0
        bne     failtst
        ldx     #2
        clc
        lda     #0
        adc     bittbl1,y
        sbc     bittbl1 + 3
        bne     failtst
 
        ldy     #$04
        ldx     #3              ;then abs
        clc
        lda     #0
        adc     bittbl2 + 4
        sbc     bittbl2,y       ;should be 0
        bne     failtst
        ldx     #4
        clc
        lda     #0
        adc     bittbl2,y
        sbc     bittbl2 + 4
        bne     failtst
 
        ldy     #5              ;ora & cmp test with reg_x
        ldx     #$05            ;First test zero & zero,y
        ora     bittbl1 +5      ;set a bit
        cmp     bittbl1,y       ;clear it
        bne     failtst
        ldx     #6
        ora     bittbl1,y
        cmp     bittbl1 + 5
        bne     failtst
 
        ldx     #7              ;again using abs cmp abs,y
        ldy     #$05
        ora     bittbl2 + 5     ;set a bit
        cmp     bittbl2,y       ;clear it
        bne     failtst
        ldx     #8
        ora     bittbl2,y
        cmp     bittbl2 + 5
        bne     failtst
 
passx   lda     #"P"
        jsr     sendtxt
        lda     #"a"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #"s"
        jsr     sendtxt
        lda     #" "
        jsr     sendtxt
        lda     #"C"
        jsr     sendtxt
        lda     #"\r"
        jsr     sendtxt
 
        jmp     (return)
ENDC
 
 
failtst php
        pha
        txa
        pha
        tya
        pha
 
        lda     #"Y"    ;Display Y register
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        pla
        jsr     hex2txt
        lda     #" "
        jsr     sendtxt
 
        lda     #"X"    ;Display X register
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        pla
        jsr     hex2txt
        lda     #" "
        jsr     sendtxt
 
        lda     #"A"    ;Display A register
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        pla
        jsr     hex2txt
        lda     #" "
        jsr     sendtxt
 
        lda     #"C"    ;Display carry
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        plp
        php
        bcc     clear1
        lda     #"1"
        jmp     cont1
clear1  lda     #"0"
cont1   jsr     sendtxt
        lda     #" "
        jsr     sendtxt
 
        lda     #"V"    ;Display overflow
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        plp
        php
        bvc     clear2
        lda     #"1"
        jmp     cont2
clear2  lda     #"0"
cont2   jsr     sendtxt
        lda     #" "
        jsr     sendtxt
 
        lda     #"Z"    ;Display zero
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        plp
        php
        beq     clear3
        lda     #"0"
        jmp     cont3
clear3  lda     #"1"
cont3   jsr     sendtxt
        lda     #" "
        jsr     sendtxt
 
        lda     #"M"    ;Display minus
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        plp
        php
        bpl     clear4
        lda     #"1"
        jmp     cont4
clear4  lda     #"0"
cont4   jsr     sendtxt
        lda     #" "
        jsr     sendtxt
 
        lda     #"I"    ;Display Interrupt flag
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        pla
        pha
        and     #intrpt
        beq     clear5
        lda     #"1"
        jmp     cont5
clear5  lda     #"0"
cont5   jsr     sendtxt
        lda     #" "
        jsr     sendtxt
 
        lda     #"B"    ;Display Break flag
        jsr     sendtxt
        lda     #"="
        jsr     sendtxt
        pla
        and     #break
        beq     clear6
        lda     #"1"
        jmp     cont6
clear6  lda     #"0"
cont6   jsr     sendtxt
 
 
        lda     #"\r"
        jsr     sendtxt
        jmp     (return)
 
bittbl2 db      $1,  $2,  $4,  $8,  $10, $20, $40, $80
nottbl2 db      $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f
 
*       = $03e0
table2  db      0
        db      1
        db      2
        db      3
        db      4
        db      5
        db      6
        db      7
        db      8
        db      9
        db      10
        db      11
        db      12
        db      13
        db      14
        db      15
 
*       =       $07ff
        nop             ;I need this to mark end of bin code.
 
 
;       end of program

Line No.	Rev	Author	Line
1	2	stanley82	`;`
2			`cpu 6502`
3			`PAGE 40,120`
4			`; ****************************************************************************************`
5	7	stanley82	`; This is intended to be the template for the user code ****`
6	2	stanley82	`; ****************************************************************************************`
7	7	stanley82	`; These flags are used for conditional assembly.`
8			`; Just select the instructions to be tested.`
9			`shiftfg equ 0`
10			`intfg equ 0`
11			`Xfg equ 0`
12			`Yfg equ 0`
13			`AddXfg equ 0`
14			`AddYfg equ 1`
15			`; ********************************************************`
16	2	stanley82
17			`return equ $fff6 ;jump to fcoo to return control and restart`
18			`sendtxt equ $fff0`
19			`hex2txt equ $fff3`
20	7	stanley82	`irq equ $4002`
21			`nmi equ $4003`
22			`break equ $10`
23			`intrpt equ $04`
24	2	stanley82
25	7	stanley82	`* = $0010`
26			`point dw table2`
27			`dw table2 + 1`
28			`dw table2 + 2`
29			`dw table2 + 3`
30			`dw table2 + 4`
31			`dw table2 + 5`
32			`dw table2 + 6`
33			`dw table2 + 7`
34			`dw table2 + 8`
35			`;`
36			`table3 db $00`
37			`bittbl1 db $1, $2, $4, $8, $10, $20, $40, $80`
38			`nottbl1 db $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f`
39	2	stanley82
40	7	stanley82	`* = $290 ;user code starts at $290`
41
42			`main clc`
43			`clv`
44			`cli`
45
46			`IF shiftfg`
47			`; *****************************************************`
48			`; Shift instruction to be tested follows`
49			`; Table2 abs and abs,x`
50			`; Table2 zero and zero,x`
51			`ldy #$a5`
52			`ldx #$03`
53			`lda #$5a`
54
55			`sta table2 + 3 ;ror and rol test`
56			`lda #$00`
57	2	stanley82	`clc`
58	7	stanley82	`rol table2,x`
59			`clc`
60			`rol table2 + 3`
61			`sec`
62			`rol table2 + 3`
63			`sec`
64			`rol table2,x`
65			`lda table2 + 3`
66
67			`sta table3 + 3 ;test asl lsr`
68			`lda #$00`
69			`lsr table3,x`
70			`lsr table3 + 3`
71			`lsr table3 + 3`
72			`lsr table3,x`
73			`lda table3 + 3`
74			`; *****************************************************`
75			`lsr ;test all shift instruction implied`
76			`lsr ;ie shift reg_a`
77			`lsr`
78			`lsr`
79			`ENDC`
80
81			`; *****************************************************`
82
83			`IF intfg`
84			`; *****************************************************`
85			`; Testing of Interrupts`
86			`; Comment in or out interrupt as required`
87			`lda #$fe`
88			`sta nmi`
89
90			`; lda #$fe`
91			`; sta irq`
92
93			`; brk`
94			`; ****************************************************`
95			`ENDC`
96
97			`IF Xfg`
98			`; *****************************************************`
99			`ldx #$03 ;lda & eor test with reg_x`
100			`ldy #1 ;First test zero and zero,x`
101			`lda bittbl1 + 3`
102			`eor bittbl1,x ;should be 0`
103			`bne failtst`
104			`ldy #2`
105			`lda bittbl1,x`
106			`eor bittbl1 + 3`
107			`bne failtst`
108
109			`ldx #$04`
110			`ldy #3 ;then abs`
111			`lda bittbl2 + 4`
112			`eor bittbl2,x ;should be 0`
113			`bne failtst`
114			`ldy #4`
115			`lda bittbl2,x`
116			`eor bittbl2 + 4`
117			`bne failtst`
118
119			`ldy #5 ;ora & and test with reg_x`
120			`ldx #$05 ;First test zero and zero,x`
121			`ora bittbl1 +5 ;set a bit`
122			`and nottbl1,x ;clear it`
123			`bne failtst`
124			`ldy #6`
125			`ora bittbl1,x`
126			`and nottbl1 + 5`
127			`bne failtst`
128
129			`ldy #7 ;again using abs and abs,x`
130			`ldx #$05`
131			`ora bittbl2 + 5 ;set a bit`
132			`and nottbl2,x ;clear it`
133			`bne failtst`
134			`ldy #8`
135			`ora bittbl2,x`
136			`and nottbl2 + 5`
137			`bne failtst`
138
139			`passx lda #"P"`
140			`jsr sendtxt`
141			`lda #"a"`
142			`jsr sendtxt`
143			`lda #"s"`
144			`jsr sendtxt`
145			`lda #"s"`
146			`jsr sendtxt`
147			`lda #" "`
148			`jsr sendtxt`
149			`lda #"X"`
150			`jsr sendtxt`
151			`lda #"\r"`
152			`jsr sendtxt`
153
154			`jmp (return)`
155
156			`ENDC`
157			`; *****************************************************`
158			`IF Yfg`
159			`; *****************************************************`
160			`ldy #$03 ;lda & eor test with reg_x`
161			`ldx #1 ;First test zero and zero,y`
162			`lda bittbl1 + 3`
163			`eor bittbl1,y ;should be 0`
164			`bne failtst`
165			`ldx #2`
166			`lda bittbl1,y`
167			`eor bittbl1 + 3`
168			`bne failtst`
169
170			`ldy #$04`
171			`ldx #3 ;then abs`
172			`lda bittbl2 + 4`
173			`eor bittbl2,y ;should be 0`
174			`bne failtst`
175			`ldx #4`
176			`lda bittbl2,y`
177			`eor bittbl2 + 4`
178			`bne failtst`
179
180			`ldx #5 ;ora & and test with reg_x`
181			`ldy #$05 ;First test zero and zero,y`
182			`ora bittbl1 +5 ;set a bit`
183			`and nottbl1,y ;clear it`
184			`bne failtst`
185			`ldx #6`
186			`ora bittbl1,y`
187			`and nottbl1 + 5`
188			`bne failtst`
189
190			`ldx #7 ;again using abs and abs,y`
191			`ldy #$05`
192			`ora bittbl2 + 5 ;set a bit`
193			`and nottbl2,y ;clear it`
194			`bne failtst`
195			`ldx #8`
196			`ora bittbl2,y`
197			`and nottbl2 + 5`
198			`bne failtst`
199
200			`passy lda #"P"`
201			`jsr sendtxt`
202			`lda #"a"`
203			`jsr sendtxt`
204			`lda #"s"`
205			`jsr sendtxt`
206			`lda #"s"`
207			`jsr sendtxt`
208			`lda #" "`
209			`jsr sendtxt`
210			`lda #"Y"`
211			`jsr sendtxt`
212			`lda #"\r"`
213			`jsr sendtxt`
214
215			`jmp (return)`
216
217			`ENDC`
218			`; *****************************************************`
219
220			`IF AddXfg`
221			`; *****************************************************`
222			`ldx #$03 ;adc & sbc test with reg_x`
223			`ldy #1 ;First test zero & zero,x`
224			`clc`
225			`lda #0`
226			`adc bittbl1 + 3`
227			`sbc bittbl1,x ;should be 0`
228			`bne failtst`
229			`ldy #2`
230			`clc`
231			`lda #0`
232			`adc bittbl1,x`
233			`sbc bittbl1 + 3`
234			`bne failtst`
235
236			`ldx #$04`
237			`ldy #3 ;then abs`
238			`clc`
239			`lda #0`
240			`adc bittbl2 + 4`
241			`sbc bittbl2,x ;should be 0`
242			`bne failtst`
243			`ldy #4`
244			`clc`
245			`lda #0`
246			`adc bittbl2,x`
247			`sbc bittbl2 + 4`
248			`bne failtst`
249
250			`ldy #5 ;ora & cmp test with reg_x`
251			`ldx #$05 ;First test zero & zero,x`
252			`ora bittbl1 +5 ;set a bit`
253			`cmp bittbl1,x ;clear it`
254			`bne failtst`
255			`ldy #6`
256			`ora bittbl1,x`
257			`cmp bittbl1 + 5`
258			`bne failtst`
259
260			`ldy #7 ;again using abs cmp abs,x`
261			`ldx #$05`
262			`ora bittbl2 + 5 ;set a bit`
263			`cmp bittbl2,x ;clear it`
264			`bne failtst`
265			`ldy #8`
266			`ora bittbl2,x`
267			`cmp bittbl2 + 5`
268			`bne failtst`
269
270			`passx lda #"P"`
271			`jsr sendtxt`
272			`lda #"a"`
273			`jsr sendtxt`
274			`lda #"s"`
275			`jsr sendtxt`
276			`lda #"s"`
277			`jsr sendtxt`
278			`lda #" "`
279			`jsr sendtxt`
280			`lda #"A"`
281			`jsr sendtxt`
282			`lda #"\r"`
283			`jsr sendtxt`
284
285			`jmp (return)`
286			`ENDC`
287
288			`IF AddYfg`
289			`; *****************************************************`
290			`ldy #$03 ;adc & sbc test with reg_x`
291			`ldx #1 ;First test zero & zero,y`
292			`clc`
293			`lda #0`
294			`adc bittbl1 + 3`
295			`sbc bittbl1,y ;should be 0`
296			`bne failtst`
297			`ldx #2`
298			`clc`
299			`lda #0`
300			`adc bittbl1,y`
301			`sbc bittbl1 + 3`
302			`bne failtst`
303
304			`ldy #$04`
305			`ldx #3 ;then abs`
306			`clc`
307			`lda #0`
308			`adc bittbl2 + 4`
309			`sbc bittbl2,y ;should be 0`
310			`bne failtst`
311			`ldx #4`
312			`clc`
313			`lda #0`
314			`adc bittbl2,y`
315			`sbc bittbl2 + 4`
316			`bne failtst`
317
318			`ldy #5 ;ora & cmp test with reg_x`
319			`ldx #$05 ;First test zero & zero,y`
320			`ora bittbl1 +5 ;set a bit`
321			`cmp bittbl1,y ;clear it`
322			`bne failtst`
323			`ldx #6`
324			`ora bittbl1,y`
325			`cmp bittbl1 + 5`
326			`bne failtst`
327
328			`ldx #7 ;again using abs cmp abs,y`
329			`ldy #$05`
330			`ora bittbl2 + 5 ;set a bit`
331			`cmp bittbl2,y ;clear it`
332			`bne failtst`
333			`ldx #8`
334			`ora bittbl2,y`
335			`cmp bittbl2 + 5`
336			`bne failtst`
337
338			`passx lda #"P"`
339			`jsr sendtxt`
340			`lda #"a"`
341			`jsr sendtxt`
342			`lda #"s"`
343			`jsr sendtxt`
344			`lda #"s"`
345			`jsr sendtxt`
346			`lda #" "`
347			`jsr sendtxt`
348			`lda #"C"`
349			`jsr sendtxt`
350			`lda #"\r"`
351			`jsr sendtxt`
352
353			`jmp (return)`
354			`ENDC`
355
356
357			`failtst php`
358	2	stanley82	`pha`
359			`txa`
360			`pha`
361			`tya`
362			`pha`
363
364			`lda #"Y" ;Display Y register`
365			`jsr sendtxt`
366			`lda #"="`
367			`jsr sendtxt`
368			`pla`
369			`jsr hex2txt`
370			`lda #" "`
371			`jsr sendtxt`
372
373			`lda #"X" ;Display X register`
374			`jsr sendtxt`
375			`lda #"="`
376			`jsr sendtxt`
377			`pla`
378			`jsr hex2txt`
379			`lda #" "`
380			`jsr sendtxt`
381
382			`lda #"A" ;Display A register`
383			`jsr sendtxt`
384			`lda #"="`
385			`jsr sendtxt`
386			`pla`
387			`jsr hex2txt`
388			`lda #" "`
389			`jsr sendtxt`
390
391			`lda #"C" ;Display carry`
392			`jsr sendtxt`
393			`lda #"="`
394			`jsr sendtxt`
395			`plp`
396			`php`
397			`bcc clear1`
398			`lda #"1"`
399			`jmp cont1`
400			`clear1 lda #"0"`
401			`cont1 jsr sendtxt`
402			`lda #" "`
403			`jsr sendtxt`
404
405			`lda #"V" ;Display overflow`
406			`jsr sendtxt`
407			`lda #"="`
408			`jsr sendtxt`
409			`plp`
410			`php`
411			`bvc clear2`
412			`lda #"1"`
413			`jmp cont2`
414			`clear2 lda #"0"`
415			`cont2 jsr sendtxt`
416			`lda #" "`
417			`jsr sendtxt`
418
419			`lda #"Z" ;Display zero`
420			`jsr sendtxt`
421			`lda #"="`
422			`jsr sendtxt`
423			`plp`
424			`php`
425			`beq clear3`
426	7	stanley82	`lda #"0"`
427	2	stanley82	`jmp cont3`
428	7	stanley82	`clear3 lda #"1"`
429	2	stanley82	`cont3 jsr sendtxt`
430			`lda #" "`
431			`jsr sendtxt`
432
433			`lda #"M" ;Display minus`
434			`jsr sendtxt`
435			`lda #"="`
436			`jsr sendtxt`
437			`plp`
438	7	stanley82	`php`
439	2	stanley82	`bpl clear4`
440			`lda #"1"`
441			`jmp cont4`
442			`clear4 lda #"0"`
443			`cont4 jsr sendtxt`
444	7	stanley82	`lda #" "`
445			`jsr sendtxt`
446	2	stanley82
447	7	stanley82	`lda #"I" ;Display Interrupt flag`
448			`jsr sendtxt`
449			`lda #"="`
450			`jsr sendtxt`
451			`pla`
452			`pha`
453			`and #intrpt`
454			`beq clear5`
455			`lda #"1"`
456			`jmp cont5`
457			`clear5 lda #"0"`
458			`cont5 jsr sendtxt`
459			`lda #" "`
460			`jsr sendtxt`
461	2	stanley82
462	7	stanley82	`lda #"B" ;Display Break flag`
463			`jsr sendtxt`
464			`lda #"="`
465			`jsr sendtxt`
466			`pla`
467			`and #break`
468			`beq clear6`
469			`lda #"1"`
470			`jmp cont6`
471			`clear6 lda #"0"`
472			`cont6 jsr sendtxt`
473
474
475	2	stanley82	`lda #"\r"`
476			`jsr sendtxt`
477			`jmp (return)`
478
479	7	stanley82	`bittbl2 db $1, $2, $4, $8, $10, $20, $40, $80`
480			`nottbl2 db $fe, $fd, $fa, $f7, $ef, $df, $bf, $7f`
481
482			`* = $03e0`
483			`table2 db 0`
484			`db 1`
485			`db 2`
486			`db 3`
487			`db 4`
488			`db 5`
489			`db 6`
490			`db 7`
491			`db 8`
492			`db 9`
493			`db 10`
494			`db 11`
495			`db 12`
496			`db 13`
497			`db 14`
498			`db 15`
499
500			`* = $07ff`

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