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[/] [lcd/] [web_uploads/] [mcv.shtml] - Blame information for rev 6

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<html>
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<head>
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<title>OPENCORES.ORG</title>
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<META NAME="keywords" CONTENT="cores, VHDL, Verilog HDL, ASIC, Synthesizable,
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standard cell, IP, Intellectual Property, 32-bit RISC, UART, PCI, SDRAM,
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full custom, system on a chip, SOC, reusable, design, development, synthesis,
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designs, developers, C, Linux, eCos, open, free, open source cores, RTL code,
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system-on-a-chip, circuits, digital, GNU, GPL, core, controller, processor,
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system design, chip design, EDA, design methodology, design tools, ASICs, programmable logic,
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FPGA's, PLDs, CPLDs, verification, Synthesis, HDL, Simulation, IC design software,
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semiconductor design, integrated circuits, system designs, chip designs, EDAs,
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design methodologies, design tool, ASIC, programmable logics, FPGA, PLD, CPLD, Synthesis,
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circuit, Synopsys, system design, chip design, programmable logic, FPGA's, PLDs,
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CPLDs, verification, Simulation">
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<META NAME="description" CONTENT="OPENCORES.ORG endorses development and hosts
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a repository of free, open source IP cores (chip designs, System-on-a-Chip) and
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supplemental boards.">
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</head>
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<body bgcolor=#ffffff>
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<table width="100%" cellspacing=5 cellpadding=0 border=0>
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    <tr valign="top"><td>
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    <center>
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        <table cellspacing=0 cellpadding=5 width="100%" valign="top" border=0>
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<tr valign="top"><td bgcolor=#f0f0f0 valign="top">
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<center><font size=+3><b>OPENCORES.ORG</b></font>
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<br><font size=-4><font color=#ffffff>.</font></font>
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<br>
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</center>
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</td></tr></table>
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    </center>
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    </td></tr>
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    <tr valign="top"><td>
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    <table border=0 cellspacing=0 cellpadding=5 width="100%"><tr valign="top"><td bgcolor="#f8f8f0">
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        &nbsp;
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    </td>
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    <td valign="top">
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    <table cellpadding=5 width="675"><tr><td valign="top" width="659">
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<font SIZE="2">-- VHDL structural description generated from `mc`
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<p>-- date : Tue Feb 20 21:19:15 2001</p>
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<p>&nbsp;</p>
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<p>-- Entity Declaration</p>
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<p>ENTITY mc IS</p>
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<p>PORT (</p>
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<p>x : in BIT; -- x</p>
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<p>res : in BIT; -- res</p>
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<p>rowsel : in BIT; -- rowsel</p>
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<p>wren : in BIT; -- wren</p>
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<p>y : out BIT; -- y</p>
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<p>vdd : in BIT; -- vdd</p>
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<p>vss : in BIT -- vss</p>
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<p>);</p>
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<p>END mc;</p>
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<p>-- Architecture Declaration</p>
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<p>ARCHITECTURE VST OF mc IS</p>
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<p>COMPONENT a2_y</p>
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<p>port (</p>
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<p>i0 : in BIT; -- i0</p>
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<p>i1 : in BIT; -- i1</p>
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<p>t : out BIT; -- t</p>
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<p>vdd : in BIT; -- vdd</p>
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<p>vss : in BIT -- vss</p>
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<p>);</p>
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<p>END COMPONENT;</p>
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<p>COMPONENT dffres</p>
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<p>port (</p>
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<p>input : in BIT; -- input</p>
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<p>clk : in BIT; -- clk</p>
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<p>reset : in BIT; -- reset</p>
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<p>output : out BIT; -- output</p>
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<p>vdd : in BIT; -- vdd</p>
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<p>vss : in BIT -- vss</p>
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<p>);</p>
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<p>END COMPONENT;</p>
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<p>COMPONENT p1_y</p>
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<p>port (</p>
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<p>i : in BIT; -- i</p>
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<p>t : out BIT; -- t</p>
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<p>vdd : in BIT; -- vdd</p>
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<p>vss : in BIT -- vss</p>
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<p>);</p>
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<p>END COMPONENT;</p>
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<p>SIGNAL c : BIT; -- c</p>
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<p>SIGNAL q : BIT; -- q</p>
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<p>BEGIN</p>
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<p>and1 : a2_y</p>
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<p>PORT MAP (</p>
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<p>vss =&gt; vss,</p>
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<p>vdd =&gt; vdd,</p>
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<p>t =&gt; c,</p>
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<p>i1 =&gt; wren,</p>
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<p>i0 =&gt; rowsel);</p>
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<p>dff : dffres</p>
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<p>PORT MAP (</p>
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<p>vss =&gt; vss,</p>
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<p>vdd =&gt; vdd,</p>
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<p>output =&gt; q,</p>
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<p>reset =&gt; res,</p>
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<p>clk =&gt; c,</p>
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<p>input =&gt; x);</p>
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<p>buf : p1_y</p>
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<p>PORT MAP (</p>
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<p>vss =&gt; vss,</p>
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<p>vdd =&gt; vdd,</p>
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<p>t =&gt; y,</p>
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<p>i =&gt; q);</p>
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<p>end VST;</p>
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</font>
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<b><font size=+1>Maintainers and Authors :</font></b>
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<p>LCD Driver development team
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<p>current members:
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<ul>
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<li>
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<a href="mailto:marta@vlsi.itb.ac.id">Hendra Gunawan</a></li>
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<li>
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<a href="mailto:sigit@students.ee.itb.ac.id">Nurhadi Wiyono</a></li>
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<li>
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<a href="mailto:sigit@students.ee.itb.ac.id">Kharisma Sinung P</a></li>
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</ul>
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&nbsp;
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<p>
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<b><font size=+1>Mailing-list:</font></b>
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<ul><a href="mailto:cores@opencores.org_NOSPAM">cores@opencores.org_NOSPAM</a></ul>
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</td></tr></table>
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</td></tr>
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<tr><td bgcolor="#f8f8f0">&nbsp;</td>
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<table cellspacing=0 cellpadding=4 border=0 width="100%"bgcolor="#f0f0f0"><tr>
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<td align=left><i><small>Last modified on Sunday, 17-Sep-2000 03:58:04 JAVT</i></td>
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<td align=right><i><small>Copyright © 1999-2000 OPENCORES.ORG. All rights reserved.</td>
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</body></html>

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