URL https://opencores.org/ocsvn/light8080/light8080/trunk

Subversion Repositories light8080

[/] [light8080/] [trunk/] [synthesis/] [sim_tb1.do] - Blame information for rev 45

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##
quit -sim
vlib work
vcom -93 -explicit  ../vhdl/light8080.vhdl
vcom -93 -explicit  ../vhdl/test/light8080_tb1.vhdl
vsim -t 1ps -lib work light8080_tb1
set PrefSource(OpenOnBreak) 0
set NumericStdNoWarnings 1
set StdArithNoWarnings 1
do tb1_modelsim_wave.do

Line No.	Rev	Author	Line
1	45	ja_rd	`##`
2			`quit -sim`
3			`vlib work`
4			`vcom -93 -explicit ../vhdl/light8080.vhdl`
5			`vcom -93 -explicit ../vhdl/test/light8080_tb1.vhdl`
6			`vsim -t 1ps -lib work light8080_tb1`
7			`set PrefSource(OpenOnBreak) 0`
8			`set NumericStdNoWarnings 1`
9			`set StdArithNoWarnings 1`
10			`do tb1_modelsim_wave.do`

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Subversion Repositories light8080

[/] [light8080/] [trunk/] [synthesis/] [sim_tb1.do] - Blame information for rev 45