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[/] [lpffir/] [trunk/] [uvm/] [rca_uvm/] [generated_tb/] [tb/] [rca/] [sv/] [rca_monitor.sv] - Blame information for rev 5

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Line No. Rev Author Line
1 5 vladimirar
// You can insert code here by setting file_header_inc in file common.tpl
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//=============================================================================
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// Project  : generated_tb
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//
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// File Name: rca_monitor.sv
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//
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//
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// Version:   1.0
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//
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// Code created by Easier UVM Code Generator version 2016-04-18-EP on Tue Mar 19 21:50:30 2019
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//=============================================================================
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// Description: Monitor for rca
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//=============================================================================
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`ifndef RCA_MONITOR_SV
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`define RCA_MONITOR_SV
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// You can insert code here by setting monitor_inc_before_class in file rca.tpl
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class rca_monitor extends uvm_monitor;
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  `uvm_component_utils(rca_monitor)
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  virtual rca_if vif;
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  uvm_analysis_port #(trans) analysis_port;
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  trans m_trans;
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  extern function new(string name, uvm_component parent);
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  // Methods build_phase, run_phase, and do_mon generated by setting monitor_inc in file rca.tpl
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  extern function void build_phase(uvm_phase phase);
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  extern task run_phase(uvm_phase phase);
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  extern task do_mon();
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  // You can insert code here by setting monitor_inc_inside_class in file rca.tpl
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endclass : rca_monitor
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function rca_monitor::new(string name, uvm_component parent);
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  super.new(name, parent);
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  analysis_port = new("analysis_port", this);
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endfunction : new
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function void rca_monitor::build_phase(uvm_phase phase);
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endfunction : build_phase
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task rca_monitor::run_phase(uvm_phase phase);
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  `uvm_info(get_type_name(), "run_phase", UVM_HIGH)
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  m_trans = trans::type_id::create("m_trans");
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  do_mon();
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endtask : run_phase
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// Start of inlined include file generated_tb/tb/include/rca_monitor_inc.sv
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task rca_monitor::do_mon;
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  forever @(posedge vif.clk)
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    begin
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          m_trans.input1 = vif.a;
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          m_trans.input2 = vif.b;
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          m_trans.carryinput = vif.ci;
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          m_trans.carryoutput = vif.co;
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          m_trans.sum = vif.s;
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          analysis_port.write(m_trans);
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          `uvm_info(get_type_name(),$sformatf("a(%0d) + b(%0d) + ci(%0d) = co(%0d) and s(%0d)", vif.a, vif.b, vif.ci, vif.co, vif.s), UVM_MEDIUM);
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    end
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endtask// End of inlined include file
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// You can insert code here by setting monitor_inc_after_class in file rca.tpl
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`endif // RCA_MONITOR_SV
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