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;*******************************************************************************
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; M16C5x_Tst2.ASM
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;
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; This is the source for the test program used to develop the PIC16C5x proce-
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; core. It has also been used to test the P16C5x version of the PIC16C5x core.
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;
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; The first instruction of the program is expected to be placed in location 0.
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;
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; The program tests most instructions, but not is a self-checking manner. In-
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; spection of the registers is the method used to verify that the cores are
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; operating correctly.
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;
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;*******************************************************************************
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LIST P=16F59, R=DEC
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;-------------------------------------------------------------------------------
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; Set ScratchPadRam here. If you are using a PIC16C5X device, use:
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;ScratchPadRam EQU 0x10
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; Otherwise, use:
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;ScratchPadRam EQU 0x20
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;-------------------------------------------------------------------------------
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ScratchPadRam EQU 0x0A
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;-------------------------------------------------------------------------------
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; Variables
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;-------------------------------------------------------------------------------
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INDF EQU 0 ; Indirect Register File Access Location
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Tmr0 EQU 1 ; Timer 0
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PCL EQU 2 ; Low Byte Program Counter
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Status EQU 3 ; Processor Status Register
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FSR EQU 4 ; File Select Register
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PortA EQU 5 ; I/O Port A Address
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PortB EQU 6 ; I/O Port B Address
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PortC EQU 7 ; I/O Port C Address
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Cntr EQU ScratchPadRam+0
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MemStart EQU ScratchPadRam+1
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Count EQU 32-MemStart
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DelayLoop EQU ScratchPadRam+0
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;-------------------------------------------------------------------------------
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; Set Reset/WDT Vector
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;-------------------------------------------------------------------------------
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ORG H'7FF'
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GOTO Start
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;-------------------------------------------------------------------------------
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; Main Program
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;-------------------------------------------------------------------------------
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ORG H'000'
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;-------------------------------------------------------------------------------
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Start BTFSS Status,3 ;; Test PD (STATUS.3), if 1, ~SLEEP restart
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GOTO SleepRestart ;; SLEEP restart, continue test program
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MOVLW 0x07 ;; load OPTION
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OPTION
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CLRW ;; clear working register
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TRIS PortA ;; load W into port control registers
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TRIS PortB
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TRIS PortC
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;
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; GOTO Next ;; Test GOTO
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;
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GOTO Next
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;
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MOVLW 0xFF ;; instruction should be skipped
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;
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Next CALL Subroutine ;; Test CALL
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MOVWF PCL ;; Test Computed GOTO, Load PCL with W
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NOP ;; No Operation
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Subroutine RETLW Subroutine + 1 ;; Test RETLW, return 0x0E in W
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MOVLW MemStart ;; starting RAM + 1
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MOVWF FSR ;; indirect address register (FSR)
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;-------------------------------------------------------------------------------
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MOVLW Count ;; internal RAM count - 1
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MOVWF Cntr ;; loop counter
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MOVLW 0xAA ;; zero working register
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;
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Loop1 MOVWF INDF ;; clear RAM indirectly
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INCF FSR,1 ;; increment FSR
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DECFSZ Cntr,1 ;; decrement loop counter
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GOTO Loop1 ;; loop until loop counter == 0
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;
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MOVLW MemStart ;; starting RAM + 1
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MOVWF FSR ;; reload FSR
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MOVLW (256 - Count) ;; set loop counter to 256 - 23
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MOVWF Cntr
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;
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Loop2 COMF INDF,1 ;; Complement Memory Pattern from Loop 1
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INCF FSR,1 ;; Increment Indirect Pointer to Memory
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INCFSZ Cntr,1 ;; increment counter loop until 0
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GOTO Loop2 ;; loop
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;
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CLRF Cntr ;; Clear Memory Location 0x08
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;-------------------------------------------------------------------------------
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DECF Cntr,1 ;; Decrement Memory Location 0x08
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ADDWF Cntr,0 ;; Add Memory Location 0x08 to W, Store in W
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SUBWF Cntr,1 ;; Subtract Memory Location 0x08
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RLF Cntr,1 ;; Rotate Memory Location 0x08
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RRF Cntr,1 ;; Rotate Memory Location
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MOVLW 0x69 ;; Load W with test pattern: W <= 0x69
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MOVWF (MemStart - 1) ;; Initialize Memory with test pattern
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SWAPF Cntr,1 ;; Test SWAPF: (0x08) <= 0x96
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IORWF Cntr,1 ;; Test IORWF: (0x08) <= 0x69 | 0x96
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ANDWF Cntr,1 ;; Test ANDWF: (0x08) <= 0x69 & 0xFF
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XORWF Cntr,1 ;; Test XORWF: (0x08) <= 0x69 ^ 0x69
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COMF Cntr ;; Test COMF: (0x08) <= ~0x00
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IORLW 0x96 ;; Test IORLW: W <= 0x69 | 0x96
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ANDLW 0x69 ;; Test ANDLW: W <= 0xFF & 0x69
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XORLW 0x69 ;; Test XORLW: W <= 0x69 ^ 0x69
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; SLEEP ;; Stop Execution of test program: HALT
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GOTO PortTst
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;-------------------------------------------------------------------------------
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SleepRestart CLRWDT ;; Detected SLEEP restart, Clr WDT to reset PD
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BTFSC Status,3 ;; Check STATUS.3, skip if ~PD clear
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GOTO Continue ;; ~PD is set, CLRWDT cleared PD
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ErrorLoop GOTO ErrorLoop ;; ERROR: hold here on error
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;
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Continue MOVLW 0x10 ;; Load FSR with non-banked RAM address
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MOVWF FSR ;; Initialize FSR for Bit Processor Tests
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CLRF INDF ;; Clear non-banked RAM location using INDF
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BSF Status,0 ;; Set STATUS.0 (C) bit
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BCF Status,1 ;; Clear STATUS.1 (DC) bit
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BCF Status,2 ;; Clear STATUS.2 (Z) bit
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MOVF Status,0 ;; Load W with STATUS
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RRF INDF,0 ;; Rotate Right RAM location: C <= 0, W <= 0x80
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RLF INDF,0 ;; Rotate Left RAM location: C <= 0, (INDF) <= 0x00
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MOVWF INDF ;; Write result back to RAM: (INDF) <= 0x80
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MOVWF Tmr0 ;; Write to TMR0, clear Prescaler
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GOTO Start ;; Restart Program
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;-------------------------------------------------------------------------------
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;PortTst
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;
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; MOVLW 0xAA ;; Load W with 0xAA
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; MOVWF PortA ;; WE_PortA
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; MOVWF PortB ;; WE_PortB
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; MOVWF PortC ;; WE_PortC
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; MOVF PortA,0 ;; RE_PortA
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; MOVF PortB,0 ;; RE_PortB
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; MOVF PortC,0 ;; RE_PortC
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; COMF PortA,1 ;; Complement PortA
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; COMF PortB,1 ;; Complement PortB
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; COMF PortC,1 ;; Complement PortC
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; CLRF PortA ;; Clear PortA
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; CLRF PortB ;; Clear PortB
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; CLRF PortC ;; Clear PortC
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; CLRW ;; zero working register
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;
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;
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PortTst DECF 0x0C,1
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MOVF 0x0C,0
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MOVWF PortA
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;
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CALL Delay
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;
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GOTO PortTst
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;
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; Delay Subroutine
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;
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Delay NOP
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;
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MOVLW 0xEE
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MOVWF 0x0A
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MOVLW 0x01
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MOVWF 0x0B
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;
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DelayLp DECFSZ 0x0A,1 ;; Decrement Delay Low
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GOTO DelayLp
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CLRWDT ;; Tickle WDT
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DECFSZ 0x0B,1 ;; Decrement Delay High
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GOTO DelayLp
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;
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RETLW 0x00
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;-------------------------------------------------------------------------------
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END
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