OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [verilator/] [bench/] [verilator/] [verilator_defines.v] - Blame information for rev 140

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 140 rfajardo
`undef  UART
2
`define UART_DPI

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.