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[/] [minsoc/] [branches/] [verilator/] [sim/] [verilator/] [generate_verilator_bench] - Blame information for rev 140

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1 140 rfajardo
#!/bin/bash
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set -o errexit
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set -o nounset
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set -o pipefail
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set -o posix    # Make command substitution subshells inherit the errexit option.
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                # Otherwise, the 'command' in this example will not fail for non-zero exit codes:  echo "$(command)"
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# Returns the number of processors + 1. Probably not the best value for make -j .
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get_make_j_val ()
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{
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  # $1 = name of the variable name to return the value in
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  local GET_MAKE_J_VAL_RET_VAR_NAME="$1"
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  local -i GET_MAKE_J_VAL_RET_VALUE
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  local -i GET_MAKE_J_VAL_PROCESSOR_COUNT
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  # Environment variable NUMBER_OF_PROCESSORS is always set under Windows.
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  if [ "${NUMBER_OF_PROCESSORS:-first}" == "${NUMBER_OF_PROCESSORS:-second}" ]
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  then
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    GET_MAKE_J_VAL_PROCESSOR_COUNT=$NUMBER_OF_PROCESSORS
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  else
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    GET_MAKE_J_VAL_PROCESSOR_COUNT="$(getconf _NPROCESSORS_ONLN)"
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  fi
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  if [ $GET_MAKE_J_VAL_PROCESSOR_COUNT -lt 1 ]
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  then
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    abort "Cannot determine the number of processors."
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  fi
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  GET_MAKE_J_VAL_RET_VALUE=$(( GET_MAKE_J_VAL_PROCESSOR_COUNT + 1 ))
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  eval "$GET_MAKE_J_VAL_RET_VAR_NAME=\$GET_MAKE_J_VAL_RET_VALUE"
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}
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VERILATOR_OUTPUT_DIR="verilator_output"
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# This makes sure the filenames in all warning and error messages are absolute paths,
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# so that clicking on them in your favourite environment will always find the right file.
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CURDIR="$(pwd)"
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# TODO: integrate this list with MinSoC's project generator.
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declare -a INCLUDE_PATHS=(
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    -I$CURDIR/../../bench/verilator
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    -I$CURDIR/../../bench/verilog
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    -I$CURDIR/../../bench/verilator/jtag_dpi
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    -I$CURDIR/../../bench/verilator/uart_dpi
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    -I$CURDIR/../../backend
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    -I$CURDIR/../../rtl/verilog/or1200/rtl/verilog
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    -I$CURDIR/../../rtl/verilog
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    -I$CURDIR/../../rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog
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    -I$CURDIR/../../rtl/verilog/adv_debug_sys/Hardware/jtag/tap/rtl/verilog
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    -I$CURDIR/../../rtl/verilog/uart16550/rtl/verilog
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    -I$CURDIR/../../rtl/verilog/ethmac/rtl/verilog
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  )
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TOP_LEVEL_MODULE="minsoc_bench_core"
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verilator \
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    -y "$CURDIR" \
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    "${INCLUDE_PATHS[@]}" \
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    --Mdir "$VERILATOR_OUTPUT_DIR" \
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    -sv --cc --exe \
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    -Wall -Wno-fatal \
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    -O3 --assert \
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    "$TOP_LEVEL_MODULE.v" \
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    $CURDIR/../../bench/verilator/jtag_dpi/jtag_dpi.cpp \
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    $CURDIR/../../bench/verilator/jtag_dpi/minsoc/verilator_main.cpp \
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    $CURDIR/../../bench/verilator/uart_dpi/uart_dpi.cpp \
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    -o "$TOP_LEVEL_MODULE.exe"
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pushd $VERILATOR_OUTPUT_DIR >/dev/null
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get_make_j_val MAKE_J_VAL
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export OPT="-O3 -Wall -Wwrite-strings -DDEBUG"
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make -f "V$TOP_LEVEL_MODULE.mk" -j "$MAKE_J_VAL"
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popd >/dev/null

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