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URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

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[/] [minsoc/] [trunk/] [prj/] [Makefile] - Blame information for rev 88

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Line No. Rev Author Line
1 88 rfajardo
PROJECTS = minsoc_bench.prj minsoc_top.prj or1200_top.prj adbg_top.prj jtag_top.prj uart_top.prj ethmac.prj
2 85 rfajardo
 
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SRC_DIR = src
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SCRIPTS_DIR = scripts
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SIMULATION_DIR = sim
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XILINX_DIR = xilinx
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ALTERA_DIR = altera
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SIMULATION_FILES = $(addprefix $(SIMULATION_DIR)/, $(addsuffix .src, $(basename $(PROJECTS))))
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XILINX_PRJ_FILES = $(addprefix $(XILINX_DIR)/, $(addsuffix .prj, $(basename $(PROJECTS))))
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XILINX_XST_FILES = $(addprefix $(XILINX_DIR)/, $(addsuffix .xst, $(basename $(PROJECTS))))
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all: $(SIMULATION_DIR)/minsoc.src $(XILINX_PRJ_FILES) $(XILINX_XST_FILES)
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clean:
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        rm -rf $(SIMULATION_DIR)/*.src $(XILINX_DIR)/*.prj $(XILINX_DIR)/*.xst
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$(XILINX_DIR)/minsoc_top.xst: $(SRC_DIR)/minsoc_top.prj
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        bash $(SCRIPTS_DIR)/xilinxxst.sh $^ $@ minsoc_top.prj minsoc_top topmodule
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$(XILINX_DIR)/minsoc_top.prj: $(SRC_DIR)/minsoc_top.prj
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        bash $(SCRIPTS_DIR)/xilinxprj.sh $^ $@ topmodule
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$(XILINX_DIR)/%.xst: $(SRC_DIR)/%.prj
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        bash $(SCRIPTS_DIR)/xilinxxst.sh $^ $@ $*.prj $*
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$(XILINX_DIR)/%.prj: $(SRC_DIR)/%.prj
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        bash $(SCRIPTS_DIR)/xilinxprj.sh $^ $@
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$(SIMULATION_DIR)/minsoc.src: $(SIMULATION_FILES)
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        cat $(SIMULATION_FILES) > $(SIMULATION_DIR)/minsoc.src
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$(SIMULATION_DIR)/%.src: $(SRC_DIR)/%.prj
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        bash $(SCRIPTS_DIR)/simprj.sh $^ $@
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