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[/] [minsoc/] [trunk/] [prj/] [src/] [ethmac.prj] - Blame information for rev 141

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Line No. Rev Author Line
1 85 rfajardo
PROJECT_DIR=rtl/verilog/ethmac/rtl/verilog
2
PROJECT_SRC=(eth_cop.v
3
eth_registers.v
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eth_rxethmac.v
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eth_miim.v
6
ethmac.v
7
eth_rxaddrcheck.v
8
eth_outputcontrol.v
9
eth_rxstatem.v
10
eth_txethmac.v
11
eth_wishbone.v
12
eth_maccontrol.v
13
eth_txstatem.v
14
ethmac_defines.v
15
eth_spram_256x32.v
16
eth_shiftreg.v
17
eth_clockgen.v
18
eth_crc.v
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eth_rxcounters.v
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eth_macstatus.v
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eth_random.v
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eth_register.v
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eth_fifo.v
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eth_receivecontrol.v
25
eth_transmitcontrol.v
26 141 rfajardo
eth_txcounters.v
27
xilinx_dist_ram_16x32.v)

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