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Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [sim/] [results/] [wave.do.sav] - Blame information for rev 2

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Line No. Rev Author Line
1 2 rfajardo
[size] 1280 1001
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[pos] -1 -1
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*-29.000000 16828000000 285000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[treeopen] minsoc_bench.
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[treeopen] minsoc_bench.minsoc_top_0.
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@28
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minsoc_bench.reset
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minsoc_bench.minsoc_top_0.or1200_top.iwb_cyc_o
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minsoc_bench.minsoc_top_0.or1200_top.iwb_stb_o
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minsoc_bench.minsoc_top_0.or1200_top.iwb_we_o
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@22
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minsoc_bench.minsoc_top_0.or1200_top.iwb_adr_o[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.iwb_dat_i[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.iwb_ack_i
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minsoc_bench.minsoc_top_0.or1200_top.dwb_cyc_o
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minsoc_bench.minsoc_top_0.or1200_top.dwb_stb_o
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minsoc_bench.minsoc_top_0.or1200_top.dwb_we_o
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@22
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minsoc_bench.minsoc_top_0.or1200_top.dwb_adr_o[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.dwb_dat_o[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.dwb_ack_i
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@22
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_sprs.sr[15:0]
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.rf_dataa[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.rf_datab[31:0]
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@28
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.flag
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.flag_we
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.result[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_alu.alu_op[3:0]
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.operand_a[31:0]
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minsoc_bench.minsoc_top_0.or1200_top.or1200_cpu.or1200_operandmuxes.operand_b[31:0]
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@28
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minsoc_bench.uart_stx
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minsoc_bench.minsoc_top_0.uart_top.wb_cyc_i
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minsoc_bench.minsoc_top_0.uart_top.wb_stb_i
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minsoc_bench.minsoc_top_0.uart_top.wb_we_i
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@22
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minsoc_bench.minsoc_top_0.uart_top.wb_adr_i[4:0]
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minsoc_bench.minsoc_top_0.uart_top.wb_dat8_i[7:0]
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minsoc_bench.minsoc_top_0.uart_top.wb_dat8_o[7:0]
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minsoc_bench.minsoc_top_0.uart_top.wb_ack_o
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minsoc_bench.minsoc_top_0.spi_flash_ss[1:0]
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minsoc_bench.minsoc_top_0.spi_flash_sclk
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minsoc_bench.minsoc_top_0.spi_flash_miso

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