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[/] [minsoc/] [trunk/] [sw/] [drivers/] [uart.c] - Blame information for rev 167

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Line No. Rev Author Line
1 80 rfajardo
#include <board.h>
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#include <support.h>
3 36 rfajardo
#include "uart.h"
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5 53 ConX.
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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#define WAIT_FOR_XMITR \
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        do { \
9 158 rfajardo
                lsr = REG8(uart_base + UART_LSR); \
10 53 ConX.
        } while ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
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#define WAIT_FOR_THRE \
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        do { \
14 158 rfajardo
                lsr = REG8(uart_base + UART_LSR); \
15 53 ConX.
        } while ((lsr & UART_LSR_THRE) != UART_LSR_THRE)
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17 158 rfajardo
#define CHECK_FOR_CHAR (REG8(uart_base + UART_LSR) & UART_LSR_DR)
18 53 ConX.
 
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#define WAIT_FOR_CHAR \
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        do { \
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                lsr = REG8(uart_base + UART_LSR); \
22 53 ConX.
        } while ((lsr & UART_LSR_DR) != UART_LSR_DR)
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#define UART_TX_BUFF_LEN 32
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#define UART_TX_BUFF_MASK (UART_TX_BUFF_LEN -1)
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27 158 rfajardo
static unsigned long uart_base = 0;
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29 53 ConX.
char tx_buff[UART_TX_BUFF_LEN];
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volatile int tx_level, rx_level;
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32 158 rfajardo
void uart_init(unsigned long base)
33 53 ConX.
{
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        int divisor;
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    uart_base = base;
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        /* Reset receiver and transmiter */
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        /* Set RX interrupt for each byte */
38 158 rfajardo
        REG8(uart_base + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1;
39 53 ConX.
 
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        /* Enable RX interrupt */
41 158 rfajardo
        REG8(uart_base + UART_IER) = UART_IER_RDI | UART_IER_THRI;
42 53 ConX.
 
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        /* Set 8 bit char, 1 stop bit, no parity */
44 158 rfajardo
        REG8(uart_base + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
45 53 ConX.
 
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        /* Set baud rate */
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        divisor = IN_CLK/(16 * UART_BAUD_RATE);
48 158 rfajardo
        REG8(uart_base + UART_LCR) |= UART_LCR_DLAB;
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        REG8(uart_base + UART_DLM) = (divisor >> 8) & 0x000000ff;
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        REG8(uart_base + UART_DLL) = divisor & 0x000000ff;
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        REG8(uart_base + UART_LCR) &= ~(UART_LCR_DLAB);
52 53 ConX.
 
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        return;
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}
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void uart_putc(char c)
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{
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        unsigned char lsr;
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        WAIT_FOR_THRE;
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        REG8(uart_base + UART_TX) = c;
62 53 ConX.
        WAIT_FOR_XMITR;
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}
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char uart_getc()
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{
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        char c;
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        c = REG8(uart_base + UART_RX);
71 53 ConX.
        return c;
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}
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75 36 rfajardo
void uart_interrupt()
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{
77 53 ConX.
        char lala;
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        unsigned char interrupt_id;
79 158 rfajardo
        interrupt_id = REG8(uart_base + UART_IIR);
80 53 ConX.
        if ( interrupt_id & UART_IIR_RDI )
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        {
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                lala = uart_getc();
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                uart_putc(lala+1);
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        }
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}
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void uart_print_str(char *p)
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{
90 53 ConX.
        while(*p != 0) {
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                uart_putc(*p);
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                p++;
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        }
94 36 rfajardo
}
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void uart_print_long(unsigned long ul)
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{
98 53 ConX.
        int i;
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        char c;
100 36 rfajardo
 
101
 
102 53 ConX.
        uart_print_str("0x");
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        for(i=0; i<8; i++) {
104 36 rfajardo
 
105 53 ConX.
                c = (char) (ul>>((7-i)*4)) & 0xf;
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                if(c >= 0x0 && c<=0x9)
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                        c += '0';
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                else
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                        c += 'a' - 10;
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                uart_putc(c);
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        }
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113 36 rfajardo
}
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void uart_print_short(unsigned long ul)
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{
117 53 ConX.
        int i;
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        char c;
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        char flag=0;
120 36 rfajardo
 
121
 
122 53 ConX.
        uart_print_str("0x");
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        for(i=0; i<8; i++) {
124 36 rfajardo
 
125 53 ConX.
                c = (char) (ul>>((7-i)*4)) & 0xf;
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                if(c >= 0x0 && c<=0x9)
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                        c += '0';
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                else
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                        c += 'a' - 10;
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                if ((c != '0') || (i==7))
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                        flag=1;
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                if(flag)
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                        uart_putc(c);
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        }
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136 36 rfajardo
}

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