OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [trunk/] [utils/] [setup/] [configure.sh] - Blame information for rev 158

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 115 rfajardo
. ${SCRIPT_DIR}/beautify.sh
2 110 rfajardo
 
3
#Configuring MinSoC
4
cecho "\nConfiguring MinSoC"
5
execcmd "cd ${DIR_TO_INSTALL}/minsoc/backend/std"
6
execcmd "Configuring MinSoC as standard board (simulatable but not synthesizable)" "./configure"
7
execcmd "cd ${DIR_TO_INSTALL}"
8
 
9
#Compiling and moving adv_jtag_bridge debug modules for simulation
10
execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/icarus"
11 112 rfajardo
execcmd "Compiling VPI interface to connect GDB with simulation" "make"
12 110 rfajardo
execcmd "cp jp-io-vpi.vpi ${DIR_TO_INSTALL}/minsoc/bench/verilog/vpi"

powered by: WebSVN 2.1.0

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.