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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [avnet-xcv1000e/] [config.h] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali
/*
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 * Automatically generated C config: don't edit
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 */
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#define AUTOCONF_INCLUDED
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#define CONFIG_MCTRL_RMW 1
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/*
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 * Synthesis
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 */
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#undef  CONFIG_SYN_INFERRED
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#undef  CONFIG_SYN_ATC18
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#undef  CONFIG_SYN_PROASIC
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#undef  CONFIG_SYN_AXCEL
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#define CONFIG_SYN_VIRTEX 1
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#undef  CONFIG_SYN_VIRTEX2
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#undef  CONFIG_SYN_INFER_RAM
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#undef  CONFIG_SYN_INFER_PADS
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/*
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 * Clock generation
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 */
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#undef  CONFIG_CLK_INFERRED
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#undef  CONFIG_CLK_ALTDLL
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#define CONFIG_CLK_CLKDLL 1
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#undef  CONFIG_CLK_DCM
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#undef  CONFIG_CLKDLL_1_2
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#define CONFIG_CLKDLL_1_1 1
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#undef  CONFIG_CLKDLL_2_1
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#undef  CONFIG_PCI_CLKDLL
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#undef  CONFIG_PCI_SYSCLK
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#define CONFIG_PROC_NUM (1)
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/*
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 * Processor
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 */
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/*
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 * Integer unit
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 */
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#define CONFIG_IU_NWINDOWS (8)
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#undef  CONFIG_IU_V8MULDIV
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#define CONFIG_IU_LDELAY (1)
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#define CONFIG_IU_WATCHPOINTS (2)
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#undef  CONFIG_PWD
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/*
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 * Floating-point unit
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 */
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#undef  CONFIG_FPU_ENABLE
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/*
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 * Cache system
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 */
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#define CONFIG_ICACHE_ENABLE 1
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#define CONFIG_ICACHE_ASSO1 1
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#undef  CONFIG_ICACHE_ASSO2
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#undef  CONFIG_ICACHE_ASSO3
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#undef  CONFIG_ICACHE_ASSO4
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#undef  CONFIG_ICACHE_SZ1
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#undef  CONFIG_ICACHE_SZ2
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#define CONFIG_ICACHE_SZ4 1
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#undef  CONFIG_ICACHE_SZ8
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#undef  CONFIG_ICACHE_SZ16
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#undef  CONFIG_ICACHE_SZ32
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#undef  CONFIG_ICACHE_SZ64
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#undef  CONFIG_ICACHE_LZ16
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#define CONFIG_ICACHE_LZ32 1
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#undef  CONFIG_ICACHE_LRAM
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#define CONFIG_DCACHE_ENABLE 1
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#define CONFIG_DCACHE_ASSO1 1
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#undef  CONFIG_DCACHE_ASSO2
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#undef  CONFIG_DCACHE_ASSO3
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#undef  CONFIG_DCACHE_ASSO4
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#undef  CONFIG_DCACHE_SZ1
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#undef  CONFIG_DCACHE_SZ2
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#define CONFIG_DCACHE_SZ4 1
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#undef  CONFIG_DCACHE_SZ8
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#undef  CONFIG_DCACHE_SZ16
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#undef  CONFIG_DCACHE_SZ32
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#undef  CONFIG_DCACHE_SZ64
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#undef  CONFIG_DCACHE_LZ16
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#define CONFIG_DCACHE_LZ32 1
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#define CONFIG_DCACHE_SNOOP 1
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#define CONFIG_DCACHE_SNOOP_SLOW 1
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#undef  CONFIG_DCACHE_SNOOP_FAST
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#undef  CONFIG_DCACHE_LRAM
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/*
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 * MMU
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 */
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#undef  CONFIG_MMU_ENABLE
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/*
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 * Debug Support Unit
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 */
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#define CONFIG_DSU_ENABLE 1
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#define CONFIG_DSU_ITRACE 1
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#define CONFIG_DSU_ITRACESZ1 1
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#undef  CONFIG_DSU_ITRACESZ2
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#undef  CONFIG_DSU_ITRACESZ4
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#undef  CONFIG_DSU_ITRACESZ8
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#undef  CONFIG_DSU_ITRACESZ16
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#define CONFIG_DSU_ATRACE 1
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#define CONFIG_DSU_ATRACESZ1 1
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#undef  CONFIG_DSU_ATRACESZ2
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#undef  CONFIG_DSU_ATRACESZ4
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#undef  CONFIG_DSU_ATRACESZ8
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#undef  CONFIG_DSU_ATRACESZ16
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/*
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 * AMBA configuration
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 */
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#define CONFIG_AHB_DEFMST (0)
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#define CONFIG_AHB_RROBIN 1
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#undef  CONFIG_AHB_SPLIT
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#define CONFIG_AHB_IOADDR FFF
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#define CONFIG_APB_HADDR 800
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/*
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 * Debug Link
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 */
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#define CONFIG_DSU_UART 1
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#undef  CONFIG_DSU_ETH
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/*
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 * Peripherals
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 */
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/*
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 * Memory controllers
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 */
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#undef  CONFIG_MCTRL_NONE
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#undef  CONFIG_MCTRL_SMALL
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#define CONFIG_MCTRL_LEON2 1
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#undef  CONFIG_MCTRL_8BIT
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#undef  CONFIG_MCTRL_16BIT
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#undef  CONFIG_MCTRL_5CS
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#define CONFIG_MCTRL_SDRAM 1
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#undef  CONFIG_MCTRL_SDRAM_SEPBUS
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#define CONFIG_MCTRL_SDRAM_INVCLK 1
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#undef  CONFIG_MCTRL_SDRAM_BUS64
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/*
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 * On-chip RAM
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 */
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#undef  CONFIG_AHBRAM_ENABLE
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/*
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 * Ethernet
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 */
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#define CONFIG_ETH_ENABLE 1
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#define CONFIG_ETH_START B00
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/*
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 * PCI
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 */
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#define CONFIG_PCI_ENABLE 1
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#define CONFIG_PCI_SIMPLE_TARGET 1
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#undef  CONFIG_PCI_MASTER_TAGET
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#undef  CONFIG_PCI_MASTER_TAGET_DMA
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#define CONFIG_PCI_VENDORID 16E3
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#define CONFIG_PCI_DEVICEID 0210
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#undef  CONFIG_PCI_TRACE
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/*
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 * CAN
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 */
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#undef  CONFIG_CAN_ENABLE
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/*
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 * Various legacy modules
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 */
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#define CONFIG_UART1_ENABLE 1
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#define CONFIG_UA1_FIFO1 1
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#undef  CONFIG_UA1_FIFO2
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#undef  CONFIG_UA1_FIFO4
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#undef  CONFIG_UA1_FIFO8
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#undef  CONFIG_UA1_FIFO16
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#undef  CONFIG_UA1_FIFO32
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#undef  CONFIG_UART2_ENABLE
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#define CONFIG_IRQ3_ENABLE 1
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#define CONFIG_GPT_ENABLE 1
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#define CONFIG_GPT_NTIM (2)
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#define CONFIG_GPT_SW (8)
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#define CONFIG_GPT_TW (32)
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#define CONFIG_GPT_IRQ (8)
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#define CONFIG_GPT_SEPIRQ 1
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/*
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 * VHDL Debugging
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 */
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#define CONFIG_IU_DISAS 1
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#define CONFIG_DEBUG_UART 1
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#undef  CONFIG_DEBUG_PC32

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