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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [gr-pci-xc5v/] [config.h] - Blame information for rev 2

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/*
 * Automatically generated C config: don't edit
 */
#define AUTOCONF_INCLUDED
#define CONFIG_MCTRL_RMW 1
/*
 * Synthesis
 */
#undef  CONFIG_SYN_INFERRED
#undef  CONFIG_SYN_ATC18
#undef  CONFIG_SYN_PROASIC
#undef  CONFIG_SYN_AXCEL
#undef  CONFIG_SYN_VIRTEX
#define CONFIG_SYN_VIRTEX2 1
#undef  CONFIG_SYN_INFER_RAM
#undef  CONFIG_SYN_INFER_PADS
/*
 * Clock generation
 */
#undef  CONFIG_CLK_INFERRED
#undef  CONFIG_CLK_ALTDLL
#undef  CONFIG_CLK_CLKDLL
#define CONFIG_CLK_DCM 1
#undef  CONFIG_DCM_2_3
#undef  CONFIG_DCM_3_4
#undef  CONFIG_DCM_4_5
#undef  CONFIG_DCM_1_1
#define CONFIG_DCM_5_4 1
#undef  CONFIG_DCM_4_3
#undef  CONFIG_DCM_3_2
#undef  CONFIG_DCM_5_3
#undef  CONFIG_DCM_2_1
#undef  CONFIG_DCM_3_1
#undef  CONFIG_DCM_4_1
#undef  CONFIG_PCI_CLKDLL
#undef  CONFIG_PCI_SYSCLK
#define CONFIG_PROC_NUM (1)
/*
 * Processor
 */
/*
 * Integer unit
 */
#define CONFIG_IU_NWINDOWS (8)
#define CONFIG_IU_V8MULDIV 1
#undef  CONFIG_IU_MUL_LATENCY_4
#define CONFIG_IU_MUL_LATENCY_5 1
#undef  CONFIG_IU_MUL_MAC
#define CONFIG_IU_LDELAY (1)
#define CONFIG_IU_WATCHPOINTS (2)
#undef  CONFIG_PWD
/*
 * Floating-point unit
 */
#undef  CONFIG_FPU_ENABLE
/*
 * Cache system
 */
#define CONFIG_ICACHE_ENABLE 1
#undef  CONFIG_ICACHE_ASSO1
#define CONFIG_ICACHE_ASSO2 1
#undef  CONFIG_ICACHE_ASSO3
#undef  CONFIG_ICACHE_ASSO4
#undef  CONFIG_ICACHE_SZ1
#undef  CONFIG_ICACHE_SZ2
#undef  CONFIG_ICACHE_SZ4
#undef  CONFIG_ICACHE_SZ8
#define CONFIG_ICACHE_SZ16 1
#undef  CONFIG_ICACHE_SZ32
#undef  CONFIG_ICACHE_SZ64
#undef  CONFIG_ICACHE_LZ16
#define CONFIG_ICACHE_LZ32 1
#undef  CONFIG_ICACHE_ALGORND
#define CONFIG_ICACHE_ALGOLRR 1
#undef  CONFIG_ICACHE_ALGOLRU
#undef  CONFIG_ICACHE_LOCK
#undef  CONFIG_ICACHE_LRAM
#define CONFIG_DCACHE_ENABLE 1
#undef  CONFIG_DCACHE_ASSO1
#define CONFIG_DCACHE_ASSO2 1
#undef  CONFIG_DCACHE_ASSO3
#undef  CONFIG_DCACHE_ASSO4
#undef  CONFIG_DCACHE_SZ1
#undef  CONFIG_DCACHE_SZ2
#undef  CONFIG_DCACHE_SZ4
#undef  CONFIG_DCACHE_SZ8
#define CONFIG_DCACHE_SZ16 1
#undef  CONFIG_DCACHE_SZ32
#undef  CONFIG_DCACHE_SZ64
#undef  CONFIG_DCACHE_LZ16
#define CONFIG_DCACHE_LZ32 1
#undef  CONFIG_DCACHE_ALGORND
#define CONFIG_DCACHE_ALGOLRR 1
#undef  CONFIG_DCACHE_ALGOLRU
#undef  CONFIG_DCACHE_LOCK
#define CONFIG_DCACHE_SNOOP 1
#define CONFIG_DCACHE_SNOOP_SLOW 1
#undef  CONFIG_DCACHE_SNOOP_FAST
#undef  CONFIG_DCACHE_LRAM
/*
 * MMU
 */
#undef  CONFIG_MMU_ENABLE
/*
 * Debug Support Unit
 */
#define CONFIG_DSU_ENABLE 1
#define CONFIG_DSU_ITRACE 1
#undef  CONFIG_DSU_ITRACESZ1
#define CONFIG_DSU_ITRACESZ2 1
#undef  CONFIG_DSU_ITRACESZ4
#undef  CONFIG_DSU_ITRACESZ8
#undef  CONFIG_DSU_ITRACESZ16
#define CONFIG_DSU_ATRACE 1
#undef  CONFIG_DSU_ATRACESZ1
#define CONFIG_DSU_ATRACESZ2 1
#undef  CONFIG_DSU_ATRACESZ4
#undef  CONFIG_DSU_ATRACESZ8
#undef  CONFIG_DSU_ATRACESZ16
/*
 * AMBA configuration
 */
#define CONFIG_AHB_DEFMST (0)
#define CONFIG_AHB_RROBIN 1
#undef  CONFIG_AHB_SPLIT
#define CONFIG_AHB_IOADDR FFF
#define CONFIG_APB_HADDR 800
/*
 * Debug Link
 */
#define CONFIG_DSU_UART 1
#undef  CONFIG_DSU_ETH
/*
 * Peripherals
 */
/*
 * Memory controllers
 */
#undef  CONFIG_MCTRL_NONE
#undef  CONFIG_MCTRL_SMALL
#define CONFIG_MCTRL_LEON2 1
#undef  CONFIG_MCTRL_8BIT
#undef  CONFIG_MCTRL_16BIT
#undef  CONFIG_MCTRL_5CS
#define CONFIG_MCTRL_SDRAM 1
#undef  CONFIG_MCTRL_SDRAM_SEPBUS
#undef  CONFIG_MCTRL_SDRAM_INVCLK
#undef  CONFIG_MCTRL_SDRAM_BUS64
/*
 * On-chip RAM
 */
#undef  CONFIG_AHBRAM_ENABLE
/*
 * Ethernet
 */
#define CONFIG_ETH_ENABLE 1
#define CONFIG_ETH_START B00
/*
 * PCI
 */
#define CONFIG_PCI_ENABLE 1
#define CONFIG_PCI_SIMPLE_TARGET 1
#undef  CONFIG_PCI_MASTER_TAGET
#undef  CONFIG_PCI_MASTER_TAGET_DMA
#define CONFIG_PCI_VENDORID 16E3
#define CONFIG_PCI_DEVICEID 0210
#undef  CONFIG_PCI_TRACE
/*
 * CAN
 */
#undef  CONFIG_CAN_ENABLE
/*
 * Various legacy modules
 */
#define CONFIG_UART1_ENABLE 1
#define CONFIG_UA1_FIFO1 1
#undef  CONFIG_UA1_FIFO2
#undef  CONFIG_UA1_FIFO4
#undef  CONFIG_UA1_FIFO8
#undef  CONFIG_UA1_FIFO16
#undef  CONFIG_UA1_FIFO32
#define CONFIG_UART2_ENABLE 1
#define CONFIG_UA2_FIFO1 1
#undef  CONFIG_UA2_FIFO2
#undef  CONFIG_UA2_FIFO4
#undef  CONFIG_UA2_FIFO8
#undef  CONFIG_UA2_FIFO16
#undef  CONFIG_UA2_FIFO32
#define CONFIG_IRQ3_ENABLE 1
#define CONFIG_GPT_ENABLE 1
#define CONFIG_GPT_NTIM (2)
#define CONFIG_GPT_SW (8)
#define CONFIG_GPT_TW (32)
#define CONFIG_GPT_IRQ (8)
#define CONFIG_GPT_SEPIRQ 1
/*
 * VHDL Debugging
 */
#define CONFIG_IU_DISAS 1
#define CONFIG_DEBUG_UART 1
#undef  CONFIG_DEBUG_PC32

Line No.	Rev	Author	Line
1	2	dimamali	`/*`
2			`* Automatically generated C config: don't edit`
3			`*/`
4			`#define AUTOCONF_INCLUDED`
5			`#define CONFIG_MCTRL_RMW 1`
6			`/*`
7			`* Synthesis`
8			`*/`
9			`#undef CONFIG_SYN_INFERRED`
10			`#undef CONFIG_SYN_ATC18`
11			`#undef CONFIG_SYN_PROASIC`
12			`#undef CONFIG_SYN_AXCEL`
13			`#undef CONFIG_SYN_VIRTEX`
14			`#define CONFIG_SYN_VIRTEX2 1`
15			`#undef CONFIG_SYN_INFER_RAM`
16			`#undef CONFIG_SYN_INFER_PADS`
17			`/*`
18			`* Clock generation`
19			`*/`
20			`#undef CONFIG_CLK_INFERRED`
21			`#undef CONFIG_CLK_ALTDLL`
22			`#undef CONFIG_CLK_CLKDLL`
23			`#define CONFIG_CLK_DCM 1`
24			`#undef CONFIG_DCM_2_3`
25			`#undef CONFIG_DCM_3_4`
26			`#undef CONFIG_DCM_4_5`
27			`#undef CONFIG_DCM_1_1`
28			`#define CONFIG_DCM_5_4 1`
29			`#undef CONFIG_DCM_4_3`
30			`#undef CONFIG_DCM_3_2`
31			`#undef CONFIG_DCM_5_3`
32			`#undef CONFIG_DCM_2_1`
33			`#undef CONFIG_DCM_3_1`
34			`#undef CONFIG_DCM_4_1`
35			`#undef CONFIG_PCI_CLKDLL`
36			`#undef CONFIG_PCI_SYSCLK`
37			`#define CONFIG_PROC_NUM (1)`
38			`/*`
39			`* Processor`
40			`*/`
41			`/*`
42			`* Integer unit`
43			`*/`
44			`#define CONFIG_IU_NWINDOWS (8)`
45			`#define CONFIG_IU_V8MULDIV 1`
46			`#undef CONFIG_IU_MUL_LATENCY_4`
47			`#define CONFIG_IU_MUL_LATENCY_5 1`
48			`#undef CONFIG_IU_MUL_MAC`
49			`#define CONFIG_IU_LDELAY (1)`
50			`#define CONFIG_IU_WATCHPOINTS (2)`
51			`#undef CONFIG_PWD`
52			`/*`
53			`* Floating-point unit`
54			`*/`
55			`#undef CONFIG_FPU_ENABLE`
56			`/*`
57			`* Cache system`
58			`*/`
59			`#define CONFIG_ICACHE_ENABLE 1`
60			`#undef CONFIG_ICACHE_ASSO1`
61			`#define CONFIG_ICACHE_ASSO2 1`
62			`#undef CONFIG_ICACHE_ASSO3`
63			`#undef CONFIG_ICACHE_ASSO4`
64			`#undef CONFIG_ICACHE_SZ1`
65			`#undef CONFIG_ICACHE_SZ2`
66			`#undef CONFIG_ICACHE_SZ4`
67			`#undef CONFIG_ICACHE_SZ8`
68			`#define CONFIG_ICACHE_SZ16 1`
69			`#undef CONFIG_ICACHE_SZ32`
70			`#undef CONFIG_ICACHE_SZ64`
71			`#undef CONFIG_ICACHE_LZ16`
72			`#define CONFIG_ICACHE_LZ32 1`
73			`#undef CONFIG_ICACHE_ALGORND`
74			`#define CONFIG_ICACHE_ALGOLRR 1`
75			`#undef CONFIG_ICACHE_ALGOLRU`
76			`#undef CONFIG_ICACHE_LOCK`
77			`#undef CONFIG_ICACHE_LRAM`
78			`#define CONFIG_DCACHE_ENABLE 1`
79			`#undef CONFIG_DCACHE_ASSO1`
80			`#define CONFIG_DCACHE_ASSO2 1`
81			`#undef CONFIG_DCACHE_ASSO3`
82			`#undef CONFIG_DCACHE_ASSO4`
83			`#undef CONFIG_DCACHE_SZ1`
84			`#undef CONFIG_DCACHE_SZ2`
85			`#undef CONFIG_DCACHE_SZ4`
86			`#undef CONFIG_DCACHE_SZ8`
87			`#define CONFIG_DCACHE_SZ16 1`
88			`#undef CONFIG_DCACHE_SZ32`
89			`#undef CONFIG_DCACHE_SZ64`
90			`#undef CONFIG_DCACHE_LZ16`
91			`#define CONFIG_DCACHE_LZ32 1`
92			`#undef CONFIG_DCACHE_ALGORND`
93			`#define CONFIG_DCACHE_ALGOLRR 1`
94			`#undef CONFIG_DCACHE_ALGOLRU`
95			`#undef CONFIG_DCACHE_LOCK`
96			`#define CONFIG_DCACHE_SNOOP 1`
97			`#define CONFIG_DCACHE_SNOOP_SLOW 1`
98			`#undef CONFIG_DCACHE_SNOOP_FAST`
99			`#undef CONFIG_DCACHE_LRAM`
100			`/*`
101			`* MMU`
102			`*/`
103			`#undef CONFIG_MMU_ENABLE`
104			`/*`
105			`* Debug Support Unit`
106			`*/`
107			`#define CONFIG_DSU_ENABLE 1`
108			`#define CONFIG_DSU_ITRACE 1`
109			`#undef CONFIG_DSU_ITRACESZ1`
110			`#define CONFIG_DSU_ITRACESZ2 1`
111			`#undef CONFIG_DSU_ITRACESZ4`
112			`#undef CONFIG_DSU_ITRACESZ8`
113			`#undef CONFIG_DSU_ITRACESZ16`
114			`#define CONFIG_DSU_ATRACE 1`
115			`#undef CONFIG_DSU_ATRACESZ1`
116			`#define CONFIG_DSU_ATRACESZ2 1`
117			`#undef CONFIG_DSU_ATRACESZ4`
118			`#undef CONFIG_DSU_ATRACESZ8`
119			`#undef CONFIG_DSU_ATRACESZ16`
120			`/*`
121			`* AMBA configuration`
122			`*/`
123			`#define CONFIG_AHB_DEFMST (0)`
124			`#define CONFIG_AHB_RROBIN 1`
125			`#undef CONFIG_AHB_SPLIT`
126			`#define CONFIG_AHB_IOADDR FFF`
127			`#define CONFIG_APB_HADDR 800`
128			`/*`
129			`* Debug Link`
130			`*/`
131			`#define CONFIG_DSU_UART 1`
132			`#undef CONFIG_DSU_ETH`
133			`/*`
134			`* Peripherals`
135			`*/`
136			`/*`
137			`* Memory controllers`
138			`*/`
139			`#undef CONFIG_MCTRL_NONE`
140			`#undef CONFIG_MCTRL_SMALL`
141			`#define CONFIG_MCTRL_LEON2 1`
142			`#undef CONFIG_MCTRL_8BIT`
143			`#undef CONFIG_MCTRL_16BIT`
144			`#undef CONFIG_MCTRL_5CS`
145			`#define CONFIG_MCTRL_SDRAM 1`
146			`#undef CONFIG_MCTRL_SDRAM_SEPBUS`
147			`#undef CONFIG_MCTRL_SDRAM_INVCLK`
148			`#undef CONFIG_MCTRL_SDRAM_BUS64`
149			`/*`
150			`* On-chip RAM`
151			`*/`
152			`#undef CONFIG_AHBRAM_ENABLE`
153			`/*`
154			`* Ethernet`
155			`*/`
156			`#define CONFIG_ETH_ENABLE 1`
157			`#define CONFIG_ETH_START B00`
158			`/*`
159			`* PCI`
160			`*/`
161			`#define CONFIG_PCI_ENABLE 1`
162			`#define CONFIG_PCI_SIMPLE_TARGET 1`
163			`#undef CONFIG_PCI_MASTER_TAGET`
164			`#undef CONFIG_PCI_MASTER_TAGET_DMA`
165			`#define CONFIG_PCI_VENDORID 16E3`
166			`#define CONFIG_PCI_DEVICEID 0210`
167			`#undef CONFIG_PCI_TRACE`
168			`/*`
169			`* CAN`
170			`*/`
171			`#undef CONFIG_CAN_ENABLE`
172			`/*`
173			`* Various legacy modules`
174			`*/`
175			`#define CONFIG_UART1_ENABLE 1`
176			`#define CONFIG_UA1_FIFO1 1`
177			`#undef CONFIG_UA1_FIFO2`
178			`#undef CONFIG_UA1_FIFO4`
179			`#undef CONFIG_UA1_FIFO8`
180			`#undef CONFIG_UA1_FIFO16`
181			`#undef CONFIG_UA1_FIFO32`
182			`#define CONFIG_UART2_ENABLE 1`
183			`#define CONFIG_UA2_FIFO1 1`
184			`#undef CONFIG_UA2_FIFO2`
185			`#undef CONFIG_UA2_FIFO4`
186			`#undef CONFIG_UA2_FIFO8`
187			`#undef CONFIG_UA2_FIFO16`
188			`#undef CONFIG_UA2_FIFO32`
189			`#define CONFIG_IRQ3_ENABLE 1`
190			`#define CONFIG_GPT_ENABLE 1`
191			`#define CONFIG_GPT_NTIM (2)`
192			`#define CONFIG_GPT_SW (8)`
193			`#define CONFIG_GPT_TW (32)`
194			`#define CONFIG_GPT_IRQ (8)`
195			`#define CONFIG_GPT_SEPIRQ 1`
196			`/*`
197			`* VHDL Debugging`
198			`*/`
199			`#define CONFIG_IU_DISAS 1`
200			`#define CONFIG_DEBUG_UART 1`
201			`#undef CONFIG_DEBUG_PC32`

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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [boards/] [gr-pci-xc5v/] [config.h] - Blame information for rev 2