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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-avnet-xc2v1500/] [tkconfig.h] - Blame information for rev 2

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#if defined CONFIG_SYN_INFERRED
#define CONFIG_SYN_TECH inferred
#elif defined CONFIG_SYN_UMC
#define CONFIG_SYN_TECH umc
#elif defined CONFIG_SYN_RHUMC
#define CONFIG_SYN_TECH rhumc
#elif defined CONFIG_SYN_ATC18
#define CONFIG_SYN_TECH atc18s
#elif defined CONFIG_SYN_AXCEL
#define CONFIG_SYN_TECH axcel
#elif defined CONFIG_SYN_PROASICPLUS
#define CONFIG_SYN_TECH proasic
#elif defined CONFIG_SYN_ALTERA
#define CONFIG_SYN_TECH altera
#elif defined CONFIG_SYN_STRATIX
#define CONFIG_SYN_TECH stratix1
#elif defined CONFIG_SYN_STRATIXII
#define CONFIG_SYN_TECH stratix2
#elif defined CONFIG_SYN_STRATIXIII
#define CONFIG_SYN_TECH stratix3
#elif defined CONFIG_SYN_CYCLONEIII
#define CONFIG_SYN_TECH cyclone3
#elif defined CONFIG_SYN_IHP25
#define CONFIG_SYN_TECH ihp25
#elif defined CONFIG_SYN_IHP25RH
#define CONFIG_SYN_TECH ihp25rh
#elif defined CONFIG_SYN_LATTICE
#define CONFIG_SYN_TECH lattice
#elif defined CONFIG_SYN_ECLIPSE
#define CONFIG_SYN_TECH eclipse
#elif defined CONFIG_SYN_PEREGRINE
#define CONFIG_SYN_TECH peregrine
#elif defined CONFIG_SYN_PROASIC
#define CONFIG_SYN_TECH proasic
#elif defined CONFIG_SYN_PROASIC3
#define CONFIG_SYN_TECH apa3
#elif defined CONFIG_SYN_SPARTAN2
#define CONFIG_SYN_TECH virtex
#elif defined CONFIG_SYN_VIRTEX
#define CONFIG_SYN_TECH virtex
#elif defined CONFIG_SYN_VIRTEXE
#define CONFIG_SYN_TECH virtex
#elif defined CONFIG_SYN_SPARTAN3
#define CONFIG_SYN_TECH spartan3
#elif defined CONFIG_SYN_SPARTAN3E
#define CONFIG_SYN_TECH spartan3e
#elif defined CONFIG_SYN_VIRTEX2
#define CONFIG_SYN_TECH virtex2
#elif defined CONFIG_SYN_VIRTEX4
#define CONFIG_SYN_TECH virtex4
#elif defined CONFIG_SYN_VIRTEX5
#define CONFIG_SYN_TECH virtex5
#elif defined CONFIG_SYN_RH_LIB18T
#define CONFIG_SYN_TECH rhlib18t
#elif defined CONFIG_SYN_UT025CRH
#define CONFIG_SYN_TECH ut25
#elif defined CONFIG_SYN_TSMC90
#define CONFIG_SYN_TECH tsmc90
#elif defined CONFIG_SYN_CUSTOM1
#define CONFIG_SYN_TECH custom1
#else
#error "unknown target technology"
#endif
 
#if defined CONFIG_SYN_INFER_RAM
#define CFG_RAM_TECH inferred
#elif defined CONFIG_MEM_UMC
#define CFG_RAM_TECH umc
#elif defined CONFIG_MEM_RHUMC
#define CFG_RAM_TECH rhumc
#elif defined CONFIG_MEM_VIRAGE
#define CFG_RAM_TECH memvirage
#elif defined CONFIG_MEM_ARTISAN
#define CFG_RAM_TECH memartisan
#elif defined CONFIG_MEM_CUSTOM1
#define CFG_RAM_TECH custom1
#elif defined CONFIG_MEM_VIRAGE90
#define CFG_RAM_TECH memvirage90
#else
#define CFG_RAM_TECH CONFIG_SYN_TECH
#endif
 
#if defined CONFIG_SYN_INFER_PADS
#define CFG_PAD_TECH inferred
#else
#define CFG_PAD_TECH CONFIG_SYN_TECH
#endif
 
#ifndef CONFIG_SYN_NO_ASYNC
#define CONFIG_SYN_NO_ASYNC 0
#endif
 
#ifndef CONFIG_SYN_SCAN
#define CONFIG_SYN_SCAN 0
#endif
 
 
#if defined CONFIG_CLK_ALTDLL
#define CFG_CLK_TECH CONFIG_SYN_TECH
#elif defined CONFIG_CLK_HCLKBUF
#define CFG_CLK_TECH axcel
#elif defined CONFIG_CLK_LATDLL
#define CFG_CLK_TECH lattice
#elif defined CONFIG_CLK_PRO3PLL
#define CFG_CLK_TECH apa3
#elif defined CONFIG_CLK_CLKDLL
#define CFG_CLK_TECH virtex
#elif defined CONFIG_CLK_DCM
#define CFG_CLK_TECH CONFIG_SYN_TECH
#elif defined CONFIG_CLK_LIB18T
#define CFG_CLK_TECH rhlib18t
#elif defined CONFIG_CLK_RHUMC
#define CFG_CLK_TECH rhumc
#else
#define CFG_CLK_TECH inferred
#endif
 
#ifndef CONFIG_CLK_MUL
#define CONFIG_CLK_MUL 2
#endif
 
#ifndef CONFIG_CLK_DIV
#define CONFIG_CLK_DIV 2
#endif
 
#ifndef CONFIG_OCLK_DIV
#define CONFIG_OCLK_DIV 2
#endif
 
#ifndef CONFIG_PCI_CLKDLL
#define CONFIG_PCI_CLKDLL 0
#endif
 
#ifndef CONFIG_PCI_SYSCLK
#define CONFIG_PCI_SYSCLK 0
#endif
 
#ifndef CONFIG_CLK_NOFB
#define CONFIG_CLK_NOFB 0
#endif
#ifndef CONFIG_LEON3
#define CONFIG_LEON3 0
#endif
 
#ifndef CONFIG_PROC_NUM
#define CONFIG_PROC_NUM 1
#endif
 
#ifndef CONFIG_IU_NWINDOWS
#define CONFIG_IU_NWINDOWS 8
#endif
 
#ifndef CONFIG_IU_RSTADDR
#define CONFIG_IU_RSTADDR 8
#endif
 
#ifndef CONFIG_IU_LDELAY
#define CONFIG_IU_LDELAY 1
#endif
 
#ifndef CONFIG_IU_WATCHPOINTS
#define CONFIG_IU_WATCHPOINTS 0
#endif
 
#ifdef CONFIG_IU_V8MULDIV
#ifdef CONFIG_IU_MUL_LATENCY_4
#define CFG_IU_V8 1
#else
#define CFG_IU_V8 2
#endif
#else
#define CFG_IU_V8 0
#endif
#ifndef CONFIG_PWD
#define CONFIG_PWD 0
#endif
 
#ifndef CONFIG_IU_MUL_MAC
#define CONFIG_IU_MUL_MAC 0
#endif
 
#ifndef CONFIG_IU_SVT
#define CONFIG_IU_SVT 0
#endif
 
#if defined CONFIG_FPU_GRFPC1
#define CONFIG_FPU_GRFPC 1
#elif defined CONFIG_FPU_GRFPC2
#define CONFIG_FPU_GRFPC 2
#else
#define CONFIG_FPU_GRFPC 0
#endif
 
#if defined CONFIG_FPU_GRFPU_INFMUL
#define CONFIG_FPU_GRFPU_MUL 0
#elif defined CONFIG_FPU_GRFPU_DWMUL
#define CONFIG_FPU_GRFPU_MUL 1
#elif defined CONFIG_FPU_GRFPU_MODGEN 
#define CONFIG_FPU_GRFPU_MUL 2
#else
#define CONFIG_FPU_GRFPU_MUL 0
#endif
 
#if defined CONFIG_FPU_GRFPU_SH
#define CONFIG_FPU_GRFPU_SHARED 1
#else
#define CONFIG_FPU_GRFPU_SHARED 0
#endif
 
#if defined CONFIG_FPU_GRFPU
#define CONFIG_FPU (1+CONFIG_FPU_GRFPU_MUL)
#elif defined CONFIG_FPU_MEIKO
#define CONFIG_FPU 15
#elif defined CONFIG_FPU_GRFPULITE
#define CONFIG_FPU (8+CONFIG_FPU_GRFPC)
#else
#define CONFIG_FPU 0
#endif
 
#ifndef CONFIG_FPU_NETLIST
#define CONFIG_FPU_NETLIST 0
#endif
 
#ifndef CONFIG_ICACHE_ENABLE
#define CONFIG_ICACHE_ENABLE 0
#endif
 
#if defined CONFIG_ICACHE_ASSO1
#define CFG_IU_ISETS 1
#elif defined CONFIG_ICACHE_ASSO2
#define CFG_IU_ISETS 2
#elif defined CONFIG_ICACHE_ASSO3
#define CFG_IU_ISETS 3
#elif defined CONFIG_ICACHE_ASSO4
#define CFG_IU_ISETS 4
#else
#define CFG_IU_ISETS 1
#endif
 
#if defined CONFIG_ICACHE_SZ1
#define CFG_ICACHE_SZ 1
#elif defined CONFIG_ICACHE_SZ2
#define CFG_ICACHE_SZ 2
#elif defined CONFIG_ICACHE_SZ4
#define CFG_ICACHE_SZ 4
#elif defined CONFIG_ICACHE_SZ8
#define CFG_ICACHE_SZ 8
#elif defined CONFIG_ICACHE_SZ16
#define CFG_ICACHE_SZ 16
#elif defined CONFIG_ICACHE_SZ32
#define CFG_ICACHE_SZ 32
#elif defined CONFIG_ICACHE_SZ64
#define CFG_ICACHE_SZ 64
#elif defined CONFIG_ICACHE_SZ128
#define CFG_ICACHE_SZ 128
#elif defined CONFIG_ICACHE_SZ256
#define CFG_ICACHE_SZ 256
#else
#define CFG_ICACHE_SZ 1
#endif
 
#ifdef CONFIG_ICACHE_LZ16
#define CFG_ILINE_SZ 4
#else
#define CFG_ILINE_SZ 8
#endif
 
#if defined CONFIG_ICACHE_ALGORND
#define CFG_ICACHE_ALGORND 2
#elif defined CONFIG_ICACHE_ALGOLRR
#define CFG_ICACHE_ALGORND 1
#else
#define CFG_ICACHE_ALGORND 0
#endif
 
#ifndef CONFIG_ICACHE_LOCK
#define CONFIG_ICACHE_LOCK 0
#endif
 
#ifndef CONFIG_ICACHE_LRAM
#define CONFIG_ICACHE_LRAM 0
#endif
 
#ifndef CONFIG_ICACHE_LRSTART
#define CONFIG_ICACHE_LRSTART 8E
#endif
 
#if defined CONFIG_ICACHE_LRAM_SZ2
#define CFG_ILRAM_SIZE 2
#elif defined CONFIG_ICACHE_LRAM_SZ4
#define CFG_ILRAM_SIZE 4
#elif defined CONFIG_ICACHE_LRAM_SZ8
#define CFG_ILRAM_SIZE 8
#elif defined CONFIG_ICACHE_LRAM_SZ16
#define CFG_ILRAM_SIZE 16
#elif defined CONFIG_ICACHE_LRAM_SZ32
#define CFG_ILRAM_SIZE 32
#elif defined CONFIG_ICACHE_LRAM_SZ64
#define CFG_ILRAM_SIZE 64
#elif defined CONFIG_ICACHE_LRAM_SZ128
#define CFG_ILRAM_SIZE 128
#elif defined CONFIG_ICACHE_LRAM_SZ256
#define CFG_ILRAM_SIZE 256
#else
#define CFG_ILRAM_SIZE 1
#endif
 
 
#ifndef CONFIG_DCACHE_ENABLE
#define CONFIG_DCACHE_ENABLE 0
#endif
 
#if defined CONFIG_DCACHE_ASSO1
#define CFG_IU_DSETS 1
#elif defined CONFIG_DCACHE_ASSO2
#define CFG_IU_DSETS 2
#elif defined CONFIG_DCACHE_ASSO3
#define CFG_IU_DSETS 3
#elif defined CONFIG_DCACHE_ASSO4
#define CFG_IU_DSETS 4
#else
#define CFG_IU_DSETS 1
#endif
 
#if defined CONFIG_DCACHE_SZ1
#define CFG_DCACHE_SZ 1
#elif defined CONFIG_DCACHE_SZ2
#define CFG_DCACHE_SZ 2
#elif defined CONFIG_DCACHE_SZ4
#define CFG_DCACHE_SZ 4
#elif defined CONFIG_DCACHE_SZ8
#define CFG_DCACHE_SZ 8
#elif defined CONFIG_DCACHE_SZ16
#define CFG_DCACHE_SZ 16
#elif defined CONFIG_DCACHE_SZ32
#define CFG_DCACHE_SZ 32
#elif defined CONFIG_DCACHE_SZ64
#define CFG_DCACHE_SZ 64
#elif defined CONFIG_DCACHE_SZ128
#define CFG_DCACHE_SZ 128
#elif defined CONFIG_DCACHE_SZ256
#define CFG_DCACHE_SZ 256
#else
#define CFG_DCACHE_SZ 1
#endif
 
#ifdef CONFIG_DCACHE_LZ16
#define CFG_DLINE_SZ 4
#else
#define CFG_DLINE_SZ 8
#endif
 
#if defined CONFIG_DCACHE_ALGORND
#define CFG_DCACHE_ALGORND 2
#elif defined CONFIG_DCACHE_ALGOLRR
#define CFG_DCACHE_ALGORND 1
#else
#define CFG_DCACHE_ALGORND 0
#endif
 
#ifndef CONFIG_DCACHE_LOCK
#define CONFIG_DCACHE_LOCK 0
#endif
 
#ifndef CONFIG_DCACHE_SNOOP
#define CONFIG_DCACHE_SNOOP 0
#endif
 
#ifndef CONFIG_DCACHE_SNOOP_FAST
#define CONFIG_DCACHE_SNOOP_FAST 0
#endif
 
#ifndef CONFIG_DCACHE_SNOOP_SEPTAG
#define CONFIG_DCACHE_SNOOP_SEPTAG 0
#endif
 
#ifndef CONFIG_CACHE_FIXED
#define CONFIG_CACHE_FIXED 0
#endif
 
#ifndef CONFIG_DCACHE_LRAM
#define CONFIG_DCACHE_LRAM 0
#endif
 
#ifndef CONFIG_DCACHE_LRSTART
#define CONFIG_DCACHE_LRSTART 8F
#endif
 
#if defined CONFIG_DCACHE_LRAM_SZ2
#define CFG_DLRAM_SIZE 2
#elif defined CONFIG_DCACHE_LRAM_SZ4
#define CFG_DLRAM_SIZE 4
#elif defined CONFIG_DCACHE_LRAM_SZ8
#define CFG_DLRAM_SIZE 8
#elif defined CONFIG_DCACHE_LRAM_SZ16
#define CFG_DLRAM_SIZE 16
#elif defined CONFIG_DCACHE_LRAM_SZ32
#define CFG_DLRAM_SIZE 32
#elif defined CONFIG_DCACHE_LRAM_SZ64
#define CFG_DLRAM_SIZE 64
#elif defined CONFIG_DCACHE_LRAM_SZ128
#define CFG_DLRAM_SIZE 128
#elif defined CONFIG_DCACHE_LRAM_SZ256
#define CFG_DLRAM_SIZE 256
#else
#define CFG_DLRAM_SIZE 1
#endif
 
 
#ifdef CONFIG_MMU_ENABLE
#define CONFIG_MMUEN 1
 
#ifdef CONFIG_MMU_SPLIT
#define CONFIG_TLB_TYPE 0
#endif
#ifdef CONFIG_MMU_COMBINED
#define CONFIG_TLB_TYPE 1
#endif
 
#ifdef CONFIG_MMU_REPARRAY
#define CONFIG_TLB_REP 0
#endif
#ifdef CONFIG_MMU_REPINCREMENT
#define CONFIG_TLB_REP 1
#endif
 
#ifdef CONFIG_MMU_I2 
#define CONFIG_ITLBNUM 2
#endif
#ifdef CONFIG_MMU_I4 
#define CONFIG_ITLBNUM 4
#endif
#ifdef CONFIG_MMU_I8 
#define CONFIG_ITLBNUM 8
#endif
#ifdef CONFIG_MMU_I16 
#define CONFIG_ITLBNUM 16
#endif
#ifdef CONFIG_MMU_I32
#define CONFIG_ITLBNUM 32
#endif
 
#define CONFIG_DTLBNUM 2
#ifdef CONFIG_MMU_D2 
#undef CONFIG_DTLBNUM 
#define CONFIG_DTLBNUM 2
#endif
#ifdef CONFIG_MMU_D4 
#undef CONFIG_DTLBNUM 
#define CONFIG_DTLBNUM 4
#endif
#ifdef CONFIG_MMU_D8 
#undef CONFIG_DTLBNUM 
#define CONFIG_DTLBNUM 8
#endif
#ifdef CONFIG_MMU_D16 
#undef CONFIG_DTLBNUM 
#define CONFIG_DTLBNUM 16
#endif
#ifdef CONFIG_MMU_D32
#undef CONFIG_DTLBNUM 
#define CONFIG_DTLBNUM 32
#endif
 
#else
#define CONFIG_MMUEN 0
#define CONFIG_ITLBNUM 2
#define CONFIG_DTLBNUM 2
#define CONFIG_TLB_TYPE 1
#define CONFIG_TLB_REP 1
#endif
 
#ifndef CONFIG_DSU_ENABLE
#define CONFIG_DSU_ENABLE 0
#endif
 
#if defined CONFIG_DSU_ITRACESZ1
#define CFG_DSU_ITB 1
#elif CONFIG_DSU_ITRACESZ2
#define CFG_DSU_ITB 2
#elif CONFIG_DSU_ITRACESZ4
#define CFG_DSU_ITB 4
#elif CONFIG_DSU_ITRACESZ8
#define CFG_DSU_ITB 8
#elif CONFIG_DSU_ITRACESZ16
#define CFG_DSU_ITB 16
#else
#define CFG_DSU_ITB 0
#endif
 
#if defined CONFIG_DSU_ATRACESZ1
#define CFG_DSU_ATB 1
#elif CONFIG_DSU_ATRACESZ2
#define CFG_DSU_ATB 2
#elif CONFIG_DSU_ATRACESZ4
#define CFG_DSU_ATB 4
#elif CONFIG_DSU_ATRACESZ8
#define CFG_DSU_ATB 8
#elif CONFIG_DSU_ATRACESZ16
#define CFG_DSU_ATB 16
#else
#define CFG_DSU_ATB 0
#endif
 
#ifndef CONFIG_LEON3FT_EN
#define CONFIG_LEON3FT_EN 0
#endif
 
#if defined CONFIG_IUFT_PAR
#define CONFIG_IUFT_EN 1
#elif defined CONFIG_IUFT_DMR
#define CONFIG_IUFT_EN 2
#elif defined CONFIG_IUFT_BCH
#define CONFIG_IUFT_EN 3
#elif defined CONFIG_IUFT_TMR
#define CONFIG_IUFT_EN 4
#else
#define CONFIG_IUFT_EN 0
#endif
#ifndef CONFIG_RF_ERRINJ
#define CONFIG_RF_ERRINJ 0
#endif
 
#ifndef CONFIG_FPUFT_EN
#define CONFIG_FPUFT 0
#else
#ifdef CONFIG_FPU_GRFPU
#define CONFIG_FPUFT 2
#else
#define CONFIG_FPUFT 1
#endif
#endif
 
#ifndef CONFIG_CACHE_FT_EN
#define CONFIG_CACHE_FT_EN 0
#endif
#ifndef CONFIG_CACHE_ERRINJ
#define CONFIG_CACHE_ERRINJ 0
#endif
 
#ifndef CONFIG_LEON3_NETLIST
#define CONFIG_LEON3_NETLIST 0
#endif
 
#ifdef CONFIG_DEBUG_PC32
#define CFG_DEBUG_PC32 0 
#else
#define CFG_DEBUG_PC32 2
#endif
#ifndef CONFIG_IU_DISAS
#define CONFIG_IU_DISAS 0
#endif
#ifndef CONFIG_IU_DISAS_NET
#define CONFIG_IU_DISAS_NET 0
#endif
 
 
#ifndef CONFIG_AHB_SPLIT
#define CONFIG_AHB_SPLIT 0
#endif
 
#ifndef CONFIG_AHB_RROBIN
#define CONFIG_AHB_RROBIN 0
#endif
 
#ifndef CONFIG_AHB_IOADDR
#define CONFIG_AHB_IOADDR FFF
#endif
 
#ifndef CONFIG_APB_HADDR
#define CONFIG_APB_HADDR 800
#endif
 
#ifndef CONFIG_AHB_MON
#define CONFIG_AHB_MON 0
#endif
 
#ifndef CONFIG_AHB_MONERR
#define CONFIG_AHB_MONERR 0
#endif
 
#ifndef CONFIG_AHB_MONWAR
#define CONFIG_AHB_MONWAR 0
#endif
 
#ifndef CONFIG_DSU_UART
#define CONFIG_DSU_UART 0
#endif
 
 
#ifndef CONFIG_DSU_JTAG
#define CONFIG_DSU_JTAG 0
#endif
 
#ifndef CONFIG_MCTRL_LEON2
#define CONFIG_MCTRL_LEON2 0
#endif
 
#ifndef CONFIG_MCTRL_SDRAM
#define CONFIG_MCTRL_SDRAM 0
#endif
 
#ifndef CONFIG_MCTRL_SDRAM_SEPBUS
#define CONFIG_MCTRL_SDRAM_SEPBUS 0
#endif
 
#ifndef CONFIG_MCTRL_SDRAM_INVCLK
#define CONFIG_MCTRL_SDRAM_INVCLK 0
#endif
 
#ifndef CONFIG_MCTRL_SDRAM_BUS64
#define CONFIG_MCTRL_SDRAM_BUS64 0
#endif
 
#ifndef CONFIG_MCTRL_8BIT
#define CONFIG_MCTRL_8BIT 0
#endif
 
#ifndef CONFIG_MCTRL_16BIT
#define CONFIG_MCTRL_16BIT 0
#endif
 
#ifndef CONFIG_MCTRL_5CS
#define CONFIG_MCTRL_5CS 0
#endif
 
#ifndef CONFIG_MCTRL_EDAC
#define CONFIG_MCTRL_EDAC 0
#endif
 
#ifndef CONFIG_MCTRL_PAGE
#define CONFIG_MCTRL_PAGE 0
#endif
 
#ifndef CONFIG_MCTRL_PROGPAGE
#define CONFIG_MCTRL_PROGPAGE 0
#endif
 
#ifndef CONFIG_DDRSP
#define CONFIG_DDRSP 0
#endif
 
#ifndef CONFIG_DDRSP_INIT
#define CONFIG_DDRSP_INIT 0
#endif
 
#ifndef CONFIG_DDRSP_FREQ
#define CONFIG_DDRSP_FREQ 100
#endif
 
#ifndef CONFIG_DDRSP_COL
#define CONFIG_DDRSP_COL 9
#endif
 
#ifndef CONFIG_DDRSP_MBYTE
#define CONFIG_DDRSP_MBYTE 8
#endif
 
#ifndef CONFIG_DDRSP_RSKEW
#define CONFIG_DDRSP_RSKEW 0
#endif
#ifndef CONFIG_AHBSTAT_ENABLE
#define CONFIG_AHBSTAT_ENABLE  0
#endif
 
#ifndef CONFIG_AHBSTAT_NFTSLV
#define CONFIG_AHBSTAT_NFTSLV  1
#endif
 
 
#ifndef CONFIG_AHBRAM_ENABLE
#define CONFIG_AHBRAM_ENABLE 0
#endif
 
#ifndef CONFIG_AHBRAM_START
#define CONFIG_AHBRAM_START A00
#endif
 
#if defined CONFIG_AHBRAM_SZ1
#define CFG_AHBRAMSZ 1
#elif CONFIG_AHBRAM_SZ2
#define CFG_AHBRAMSZ 2
#elif CONFIG_AHBRAM_SZ4
#define CFG_AHBRAMSZ 4
#elif CONFIG_AHBRAM_SZ8
#define CFG_AHBRAMSZ 8
#elif CONFIG_AHBRAM_SZ16
#define CFG_AHBRAMSZ 16
#elif CONFIG_AHBRAM_SZ32
#define CFG_AHBRAMSZ 32
#elif CONFIG_AHBRAM_SZ64
#define CFG_AHBRAMSZ 64
#else
#define CFG_AHBRAMSZ 1
#endif
 
#if defined CONFIG_PCI_SIMPLE_TARGET
#define CFG_PCITYPE 1
#elif defined CONFIG_PCI_MASTER_TARGET_DMA
#define CFG_PCITYPE 3
#elif defined CONFIG_PCI_MASTER_TARGET
#define CFG_PCITYPE 2
#else
#define CFG_PCITYPE 0
#endif
 
#ifndef CONFIG_PCI_VENDORID
#define CONFIG_PCI_VENDORID 0
#endif
 
#ifndef CONFIG_PCI_DEVICEID
#define CONFIG_PCI_DEVICEID 0
#endif
 
#ifndef CONFIG_PCI_REVID
#define CONFIG_PCI_REVID 0
#endif
 
#if defined CONFIG_PCI_FIFO0
#define CFG_PCIFIFO 8
#define CFG_PCI_ENFIFO 0
#elif defined CONFIG_PCI_FIFO16
#define CFG_PCIFIFO 16
#elif defined CONFIG_PCI_FIFO32
#define CFG_PCIFIFO 32
#elif defined CONFIG_PCI_FIFO64
#define CFG_PCIFIFO 64
#elif defined CONFIG_PCI_FIFO128
#define CFG_PCIFIFO 128
#elif defined CONFIG_PCI_FIFO256
#define CFG_PCIFIFO 256
#else
#define CFG_PCIFIFO 8
#endif
 
#ifndef CFG_PCI_ENFIFO
#define CFG_PCI_ENFIFO 1
#endif
 
#ifndef CONFIG_PCI_TRACE
#define CONFIG_PCI_TRACE 0
#endif
 
#if defined CONFIG_PCI_TRACE512
#define CFG_PCI_TRACEBUF 512
#elif defined CONFIG_PCI_TRACE1024
#define CFG_PCI_TRACEBUF 1024
#elif defined CONFIG_PCI_TRACE2048
#define CFG_PCI_TRACEBUF 2048
#elif defined CONFIG_PCI_TRACE4096
#define CFG_PCI_TRACEBUF 4096
#else
#define CFG_PCI_TRACEBUF 256
#endif
 
 
#ifndef CONFIG_UART1_ENABLE
#define CONFIG_UART1_ENABLE 0
#endif
 
#if defined CONFIG_UA1_FIFO1
#define CFG_UA1_FIFO 1
#elif defined CONFIG_UA1_FIFO2
#define CFG_UA1_FIFO 2
#elif defined CONFIG_UA1_FIFO4
#define CFG_UA1_FIFO 4
#elif defined CONFIG_UA1_FIFO8
#define CFG_UA1_FIFO 8
#elif defined CONFIG_UA1_FIFO16
#define CFG_UA1_FIFO 16
#elif defined CONFIG_UA1_FIFO32
#define CFG_UA1_FIFO 32
#else
#define CFG_UA1_FIFO 1
#endif
 
#ifndef CONFIG_IRQ3_ENABLE
#define CONFIG_IRQ3_ENABLE 0
#endif
#ifndef CONFIG_GPT_ENABLE
#define CONFIG_GPT_ENABLE 0
#endif
 
#ifndef CONFIG_GPT_NTIM
#define CONFIG_GPT_NTIM 1
#endif
 
#ifndef CONFIG_GPT_SW
#define CONFIG_GPT_SW 8
#endif
 
#ifndef CONFIG_GPT_TW
#define CONFIG_GPT_TW 8
#endif
 
#ifndef CONFIG_GPT_IRQ
#define CONFIG_GPT_IRQ 8
#endif
 
#ifndef CONFIG_GPT_SEPIRQ
#define CONFIG_GPT_SEPIRQ 0
#endif
#ifndef CONFIG_GPT_ENABLE
#define CONFIG_GPT_ENABLE 0
#endif
 
#ifndef CONFIG_GPT_NTIM
#define CONFIG_GPT_NTIM 1
#endif
 
#ifndef CONFIG_GPT_SW
#define CONFIG_GPT_SW 8
#endif
 
#ifndef CONFIG_GPT_TW
#define CONFIG_GPT_TW 8
#endif
 
#ifndef CONFIG_GPT_IRQ
#define CONFIG_GPT_IRQ 8
#endif
 
#ifndef CONFIG_GPT_SEPIRQ
#define CONFIG_GPT_SEPIRQ 0
#endif
 
#ifndef CONFIG_GPT_WDOGEN
#define CONFIG_GPT_WDOGEN 0
#endif
 
#ifndef CONFIG_GPT_WDOG
#define CONFIG_GPT_WDOG 0
#endif
 
#ifndef CONFIG_GRGPIO_ENABLE
#define CONFIG_GRGPIO_ENABLE 0
#endif
#ifndef CONFIG_GRGPIO_IMASK
#define CONFIG_GRGPIO_IMASK 0000
#endif
#ifndef CONFIG_GRGPIO_WIDTH
#define CONFIG_GRGPIO_WIDTH 1
#endif
 
 
#ifndef CONFIG_DEBUG_UART
#define CONFIG_DEBUG_UART 0
#endif

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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-avnet-xc2v1500/] [tkconfig.h] - Blame information for rev 2

Line No.	Rev	Author	Line
1	2	dimamali	`#if defined CONFIG_SYN_INFERRED`
2			`#define CONFIG_SYN_TECH inferred`
3			`#elif defined CONFIG_SYN_UMC`
4			`#define CONFIG_SYN_TECH umc`
5			`#elif defined CONFIG_SYN_RHUMC`
6			`#define CONFIG_SYN_TECH rhumc`
7			`#elif defined CONFIG_SYN_ATC18`
8			`#define CONFIG_SYN_TECH atc18s`
9			`#elif defined CONFIG_SYN_AXCEL`
10			`#define CONFIG_SYN_TECH axcel`
11			`#elif defined CONFIG_SYN_PROASICPLUS`
12			`#define CONFIG_SYN_TECH proasic`
13			`#elif defined CONFIG_SYN_ALTERA`
14			`#define CONFIG_SYN_TECH altera`
15			`#elif defined CONFIG_SYN_STRATIX`
16			`#define CONFIG_SYN_TECH stratix1`
17			`#elif defined CONFIG_SYN_STRATIXII`
18			`#define CONFIG_SYN_TECH stratix2`
19			`#elif defined CONFIG_SYN_STRATIXIII`
20			`#define CONFIG_SYN_TECH stratix3`
21			`#elif defined CONFIG_SYN_CYCLONEIII`
22			`#define CONFIG_SYN_TECH cyclone3`
23			`#elif defined CONFIG_SYN_IHP25`
24			`#define CONFIG_SYN_TECH ihp25`
25			`#elif defined CONFIG_SYN_IHP25RH`
26			`#define CONFIG_SYN_TECH ihp25rh`
27			`#elif defined CONFIG_SYN_LATTICE`
28			`#define CONFIG_SYN_TECH lattice`
29			`#elif defined CONFIG_SYN_ECLIPSE`
30			`#define CONFIG_SYN_TECH eclipse`
31			`#elif defined CONFIG_SYN_PEREGRINE`
32			`#define CONFIG_SYN_TECH peregrine`
33			`#elif defined CONFIG_SYN_PROASIC`
34			`#define CONFIG_SYN_TECH proasic`
35			`#elif defined CONFIG_SYN_PROASIC3`
36			`#define CONFIG_SYN_TECH apa3`
37			`#elif defined CONFIG_SYN_SPARTAN2`
38			`#define CONFIG_SYN_TECH virtex`
39			`#elif defined CONFIG_SYN_VIRTEX`
40			`#define CONFIG_SYN_TECH virtex`
41			`#elif defined CONFIG_SYN_VIRTEXE`
42			`#define CONFIG_SYN_TECH virtex`
43			`#elif defined CONFIG_SYN_SPARTAN3`
44			`#define CONFIG_SYN_TECH spartan3`
45			`#elif defined CONFIG_SYN_SPARTAN3E`
46			`#define CONFIG_SYN_TECH spartan3e`
47			`#elif defined CONFIG_SYN_VIRTEX2`
48			`#define CONFIG_SYN_TECH virtex2`
49			`#elif defined CONFIG_SYN_VIRTEX4`
50			`#define CONFIG_SYN_TECH virtex4`
51			`#elif defined CONFIG_SYN_VIRTEX5`
52			`#define CONFIG_SYN_TECH virtex5`
53			`#elif defined CONFIG_SYN_RH_LIB18T`
54			`#define CONFIG_SYN_TECH rhlib18t`
55			`#elif defined CONFIG_SYN_UT025CRH`
56			`#define CONFIG_SYN_TECH ut25`
57			`#elif defined CONFIG_SYN_TSMC90`
58			`#define CONFIG_SYN_TECH tsmc90`
59			`#elif defined CONFIG_SYN_CUSTOM1`
60			`#define CONFIG_SYN_TECH custom1`
61			`#else`
62			`#error "unknown target technology"`
63			`#endif`
64
65			`#if defined CONFIG_SYN_INFER_RAM`
66			`#define CFG_RAM_TECH inferred`
67			`#elif defined CONFIG_MEM_UMC`
68			`#define CFG_RAM_TECH umc`
69			`#elif defined CONFIG_MEM_RHUMC`
70			`#define CFG_RAM_TECH rhumc`
71			`#elif defined CONFIG_MEM_VIRAGE`
72			`#define CFG_RAM_TECH memvirage`
73			`#elif defined CONFIG_MEM_ARTISAN`
74			`#define CFG_RAM_TECH memartisan`
75			`#elif defined CONFIG_MEM_CUSTOM1`
76			`#define CFG_RAM_TECH custom1`
77			`#elif defined CONFIG_MEM_VIRAGE90`
78			`#define CFG_RAM_TECH memvirage90`
79			`#else`
80			`#define CFG_RAM_TECH CONFIG_SYN_TECH`
81			`#endif`
82
83			`#if defined CONFIG_SYN_INFER_PADS`
84			`#define CFG_PAD_TECH inferred`
85			`#else`
86			`#define CFG_PAD_TECH CONFIG_SYN_TECH`
87			`#endif`
88
89			`#ifndef CONFIG_SYN_NO_ASYNC`
90			`#define CONFIG_SYN_NO_ASYNC 0`
91			`#endif`
92
93			`#ifndef CONFIG_SYN_SCAN`
94			`#define CONFIG_SYN_SCAN 0`
95			`#endif`
96
97
98			`#if defined CONFIG_CLK_ALTDLL`
99			`#define CFG_CLK_TECH CONFIG_SYN_TECH`
100			`#elif defined CONFIG_CLK_HCLKBUF`
101			`#define CFG_CLK_TECH axcel`
102			`#elif defined CONFIG_CLK_LATDLL`
103			`#define CFG_CLK_TECH lattice`
104			`#elif defined CONFIG_CLK_PRO3PLL`
105			`#define CFG_CLK_TECH apa3`
106			`#elif defined CONFIG_CLK_CLKDLL`
107			`#define CFG_CLK_TECH virtex`
108			`#elif defined CONFIG_CLK_DCM`
109			`#define CFG_CLK_TECH CONFIG_SYN_TECH`
110			`#elif defined CONFIG_CLK_LIB18T`
111			`#define CFG_CLK_TECH rhlib18t`
112			`#elif defined CONFIG_CLK_RHUMC`
113			`#define CFG_CLK_TECH rhumc`
114			`#else`
115			`#define CFG_CLK_TECH inferred`
116			`#endif`
117
118			`#ifndef CONFIG_CLK_MUL`
119			`#define CONFIG_CLK_MUL 2`
120			`#endif`
121
122			`#ifndef CONFIG_CLK_DIV`
123			`#define CONFIG_CLK_DIV 2`
124			`#endif`
125
126			`#ifndef CONFIG_OCLK_DIV`
127			`#define CONFIG_OCLK_DIV 2`
128			`#endif`
129
130			`#ifndef CONFIG_PCI_CLKDLL`
131			`#define CONFIG_PCI_CLKDLL 0`
132			`#endif`
133
134			`#ifndef CONFIG_PCI_SYSCLK`
135			`#define CONFIG_PCI_SYSCLK 0`
136			`#endif`
137
138			`#ifndef CONFIG_CLK_NOFB`
139			`#define CONFIG_CLK_NOFB 0`
140			`#endif`
141			`#ifndef CONFIG_LEON3`
142			`#define CONFIG_LEON3 0`
143			`#endif`
144
145			`#ifndef CONFIG_PROC_NUM`
146			`#define CONFIG_PROC_NUM 1`
147			`#endif`
148
149			`#ifndef CONFIG_IU_NWINDOWS`
150			`#define CONFIG_IU_NWINDOWS 8`
151			`#endif`
152
153			`#ifndef CONFIG_IU_RSTADDR`
154			`#define CONFIG_IU_RSTADDR 8`
155			`#endif`
156
157			`#ifndef CONFIG_IU_LDELAY`
158			`#define CONFIG_IU_LDELAY 1`
159			`#endif`
160
161			`#ifndef CONFIG_IU_WATCHPOINTS`
162			`#define CONFIG_IU_WATCHPOINTS 0`
163			`#endif`
164
165			`#ifdef CONFIG_IU_V8MULDIV`
166			`#ifdef CONFIG_IU_MUL_LATENCY_4`
167			`#define CFG_IU_V8 1`
168			`#else`
169			`#define CFG_IU_V8 2`
170			`#endif`
171			`#else`
172			`#define CFG_IU_V8 0`
173			`#endif`
174			`#ifndef CONFIG_PWD`
175			`#define CONFIG_PWD 0`
176			`#endif`
177
178			`#ifndef CONFIG_IU_MUL_MAC`
179			`#define CONFIG_IU_MUL_MAC 0`
180			`#endif`
181
182			`#ifndef CONFIG_IU_SVT`
183			`#define CONFIG_IU_SVT 0`
184			`#endif`
185
186			`#if defined CONFIG_FPU_GRFPC1`
187			`#define CONFIG_FPU_GRFPC 1`
188			`#elif defined CONFIG_FPU_GRFPC2`
189			`#define CONFIG_FPU_GRFPC 2`
190			`#else`
191			`#define CONFIG_FPU_GRFPC 0`
192			`#endif`
193
194			`#if defined CONFIG_FPU_GRFPU_INFMUL`
195			`#define CONFIG_FPU_GRFPU_MUL 0`
196			`#elif defined CONFIG_FPU_GRFPU_DWMUL`
197			`#define CONFIG_FPU_GRFPU_MUL 1`
198			`#elif defined CONFIG_FPU_GRFPU_MODGEN`
199			`#define CONFIG_FPU_GRFPU_MUL 2`
200			`#else`
201			`#define CONFIG_FPU_GRFPU_MUL 0`
202			`#endif`
203
204			`#if defined CONFIG_FPU_GRFPU_SH`
205			`#define CONFIG_FPU_GRFPU_SHARED 1`
206			`#else`
207			`#define CONFIG_FPU_GRFPU_SHARED 0`
208			`#endif`
209
210			`#if defined CONFIG_FPU_GRFPU`
211			`#define CONFIG_FPU (1+CONFIG_FPU_GRFPU_MUL)`
212			`#elif defined CONFIG_FPU_MEIKO`
213			`#define CONFIG_FPU 15`
214			`#elif defined CONFIG_FPU_GRFPULITE`
215			`#define CONFIG_FPU (8+CONFIG_FPU_GRFPC)`
216			`#else`
217			`#define CONFIG_FPU 0`
218			`#endif`
219
220			`#ifndef CONFIG_FPU_NETLIST`
221			`#define CONFIG_FPU_NETLIST 0`
222			`#endif`
223
224			`#ifndef CONFIG_ICACHE_ENABLE`
225			`#define CONFIG_ICACHE_ENABLE 0`
226			`#endif`
227
228			`#if defined CONFIG_ICACHE_ASSO1`
229			`#define CFG_IU_ISETS 1`
230			`#elif defined CONFIG_ICACHE_ASSO2`
231			`#define CFG_IU_ISETS 2`
232			`#elif defined CONFIG_ICACHE_ASSO3`
233			`#define CFG_IU_ISETS 3`
234			`#elif defined CONFIG_ICACHE_ASSO4`
235			`#define CFG_IU_ISETS 4`
236			`#else`
237			`#define CFG_IU_ISETS 1`
238			`#endif`
239
240			`#if defined CONFIG_ICACHE_SZ1`
241			`#define CFG_ICACHE_SZ 1`
242			`#elif defined CONFIG_ICACHE_SZ2`
243			`#define CFG_ICACHE_SZ 2`
244			`#elif defined CONFIG_ICACHE_SZ4`
245			`#define CFG_ICACHE_SZ 4`
246			`#elif defined CONFIG_ICACHE_SZ8`
247			`#define CFG_ICACHE_SZ 8`
248			`#elif defined CONFIG_ICACHE_SZ16`
249			`#define CFG_ICACHE_SZ 16`
250			`#elif defined CONFIG_ICACHE_SZ32`
251			`#define CFG_ICACHE_SZ 32`
252			`#elif defined CONFIG_ICACHE_SZ64`
253			`#define CFG_ICACHE_SZ 64`
254			`#elif defined CONFIG_ICACHE_SZ128`
255			`#define CFG_ICACHE_SZ 128`
256			`#elif defined CONFIG_ICACHE_SZ256`
257			`#define CFG_ICACHE_SZ 256`
258			`#else`
259			`#define CFG_ICACHE_SZ 1`
260			`#endif`
261
262			`#ifdef CONFIG_ICACHE_LZ16`
263			`#define CFG_ILINE_SZ 4`
264			`#else`
265			`#define CFG_ILINE_SZ 8`
266			`#endif`
267
268			`#if defined CONFIG_ICACHE_ALGORND`
269			`#define CFG_ICACHE_ALGORND 2`
270			`#elif defined CONFIG_ICACHE_ALGOLRR`
271			`#define CFG_ICACHE_ALGORND 1`
272			`#else`
273			`#define CFG_ICACHE_ALGORND 0`
274			`#endif`
275
276			`#ifndef CONFIG_ICACHE_LOCK`
277			`#define CONFIG_ICACHE_LOCK 0`
278			`#endif`
279
280			`#ifndef CONFIG_ICACHE_LRAM`
281			`#define CONFIG_ICACHE_LRAM 0`
282			`#endif`
283
284			`#ifndef CONFIG_ICACHE_LRSTART`
285			`#define CONFIG_ICACHE_LRSTART 8E`
286			`#endif`
287
288			`#if defined CONFIG_ICACHE_LRAM_SZ2`
289			`#define CFG_ILRAM_SIZE 2`
290			`#elif defined CONFIG_ICACHE_LRAM_SZ4`
291			`#define CFG_ILRAM_SIZE 4`
292			`#elif defined CONFIG_ICACHE_LRAM_SZ8`
293			`#define CFG_ILRAM_SIZE 8`
294			`#elif defined CONFIG_ICACHE_LRAM_SZ16`
295			`#define CFG_ILRAM_SIZE 16`
296			`#elif defined CONFIG_ICACHE_LRAM_SZ32`
297			`#define CFG_ILRAM_SIZE 32`
298			`#elif defined CONFIG_ICACHE_LRAM_SZ64`
299			`#define CFG_ILRAM_SIZE 64`
300			`#elif defined CONFIG_ICACHE_LRAM_SZ128`
301			`#define CFG_ILRAM_SIZE 128`
302			`#elif defined CONFIG_ICACHE_LRAM_SZ256`
303			`#define CFG_ILRAM_SIZE 256`
304			`#else`
305			`#define CFG_ILRAM_SIZE 1`
306			`#endif`
307
308
309			`#ifndef CONFIG_DCACHE_ENABLE`
310			`#define CONFIG_DCACHE_ENABLE 0`
311			`#endif`
312
313			`#if defined CONFIG_DCACHE_ASSO1`
314			`#define CFG_IU_DSETS 1`
315			`#elif defined CONFIG_DCACHE_ASSO2`
316			`#define CFG_IU_DSETS 2`
317			`#elif defined CONFIG_DCACHE_ASSO3`
318			`#define CFG_IU_DSETS 3`
319			`#elif defined CONFIG_DCACHE_ASSO4`
320			`#define CFG_IU_DSETS 4`
321			`#else`
322			`#define CFG_IU_DSETS 1`
323			`#endif`
324
325			`#if defined CONFIG_DCACHE_SZ1`
326			`#define CFG_DCACHE_SZ 1`
327			`#elif defined CONFIG_DCACHE_SZ2`
328			`#define CFG_DCACHE_SZ 2`
329			`#elif defined CONFIG_DCACHE_SZ4`
330			`#define CFG_DCACHE_SZ 4`
331			`#elif defined CONFIG_DCACHE_SZ8`
332			`#define CFG_DCACHE_SZ 8`
333			`#elif defined CONFIG_DCACHE_SZ16`
334			`#define CFG_DCACHE_SZ 16`
335			`#elif defined CONFIG_DCACHE_SZ32`
336			`#define CFG_DCACHE_SZ 32`
337			`#elif defined CONFIG_DCACHE_SZ64`
338			`#define CFG_DCACHE_SZ 64`
339			`#elif defined CONFIG_DCACHE_SZ128`
340			`#define CFG_DCACHE_SZ 128`
341			`#elif defined CONFIG_DCACHE_SZ256`
342			`#define CFG_DCACHE_SZ 256`
343			`#else`
344			`#define CFG_DCACHE_SZ 1`
345			`#endif`
346
347			`#ifdef CONFIG_DCACHE_LZ16`
348			`#define CFG_DLINE_SZ 4`
349			`#else`
350			`#define CFG_DLINE_SZ 8`
351			`#endif`
352
353			`#if defined CONFIG_DCACHE_ALGORND`
354			`#define CFG_DCACHE_ALGORND 2`
355			`#elif defined CONFIG_DCACHE_ALGOLRR`
356			`#define CFG_DCACHE_ALGORND 1`
357			`#else`
358			`#define CFG_DCACHE_ALGORND 0`
359			`#endif`
360
361			`#ifndef CONFIG_DCACHE_LOCK`
362			`#define CONFIG_DCACHE_LOCK 0`
363			`#endif`
364
365			`#ifndef CONFIG_DCACHE_SNOOP`
366			`#define CONFIG_DCACHE_SNOOP 0`
367			`#endif`
368
369			`#ifndef CONFIG_DCACHE_SNOOP_FAST`
370			`#define CONFIG_DCACHE_SNOOP_FAST 0`
371			`#endif`
372
373			`#ifndef CONFIG_DCACHE_SNOOP_SEPTAG`
374			`#define CONFIG_DCACHE_SNOOP_SEPTAG 0`
375			`#endif`
376
377			`#ifndef CONFIG_CACHE_FIXED`
378			`#define CONFIG_CACHE_FIXED 0`
379			`#endif`
380
381			`#ifndef CONFIG_DCACHE_LRAM`
382			`#define CONFIG_DCACHE_LRAM 0`
383			`#endif`
384
385			`#ifndef CONFIG_DCACHE_LRSTART`
386			`#define CONFIG_DCACHE_LRSTART 8F`
387			`#endif`
388
389			`#if defined CONFIG_DCACHE_LRAM_SZ2`
390			`#define CFG_DLRAM_SIZE 2`
391			`#elif defined CONFIG_DCACHE_LRAM_SZ4`
392			`#define CFG_DLRAM_SIZE 4`
393			`#elif defined CONFIG_DCACHE_LRAM_SZ8`
394			`#define CFG_DLRAM_SIZE 8`
395			`#elif defined CONFIG_DCACHE_LRAM_SZ16`
396			`#define CFG_DLRAM_SIZE 16`
397			`#elif defined CONFIG_DCACHE_LRAM_SZ32`
398			`#define CFG_DLRAM_SIZE 32`
399			`#elif defined CONFIG_DCACHE_LRAM_SZ64`
400			`#define CFG_DLRAM_SIZE 64`
401			`#elif defined CONFIG_DCACHE_LRAM_SZ128`
402			`#define CFG_DLRAM_SIZE 128`
403			`#elif defined CONFIG_DCACHE_LRAM_SZ256`
404			`#define CFG_DLRAM_SIZE 256`
405			`#else`
406			`#define CFG_DLRAM_SIZE 1`
407			`#endif`
408
409
410			`#ifdef CONFIG_MMU_ENABLE`
411			`#define CONFIG_MMUEN 1`
412
413			`#ifdef CONFIG_MMU_SPLIT`
414			`#define CONFIG_TLB_TYPE 0`
415			`#endif`
416			`#ifdef CONFIG_MMU_COMBINED`
417			`#define CONFIG_TLB_TYPE 1`
418			`#endif`
419
420			`#ifdef CONFIG_MMU_REPARRAY`
421			`#define CONFIG_TLB_REP 0`
422			`#endif`
423			`#ifdef CONFIG_MMU_REPINCREMENT`
424			`#define CONFIG_TLB_REP 1`
425			`#endif`
426
427			`#ifdef CONFIG_MMU_I2`
428			`#define CONFIG_ITLBNUM 2`
429			`#endif`
430			`#ifdef CONFIG_MMU_I4`
431			`#define CONFIG_ITLBNUM 4`
432			`#endif`
433			`#ifdef CONFIG_MMU_I8`
434			`#define CONFIG_ITLBNUM 8`
435			`#endif`
436			`#ifdef CONFIG_MMU_I16`
437			`#define CONFIG_ITLBNUM 16`
438			`#endif`
439			`#ifdef CONFIG_MMU_I32`
440			`#define CONFIG_ITLBNUM 32`
441			`#endif`
442
443			`#define CONFIG_DTLBNUM 2`
444			`#ifdef CONFIG_MMU_D2`
445			`#undef CONFIG_DTLBNUM`
446			`#define CONFIG_DTLBNUM 2`
447			`#endif`
448			`#ifdef CONFIG_MMU_D4`
449			`#undef CONFIG_DTLBNUM`
450			`#define CONFIG_DTLBNUM 4`
451			`#endif`
452			`#ifdef CONFIG_MMU_D8`
453			`#undef CONFIG_DTLBNUM`
454			`#define CONFIG_DTLBNUM 8`
455			`#endif`
456			`#ifdef CONFIG_MMU_D16`
457			`#undef CONFIG_DTLBNUM`
458			`#define CONFIG_DTLBNUM 16`
459			`#endif`
460			`#ifdef CONFIG_MMU_D32`
461			`#undef CONFIG_DTLBNUM`
462			`#define CONFIG_DTLBNUM 32`
463			`#endif`
464
465			`#else`
466			`#define CONFIG_MMUEN 0`
467			`#define CONFIG_ITLBNUM 2`
468			`#define CONFIG_DTLBNUM 2`
469			`#define CONFIG_TLB_TYPE 1`
470			`#define CONFIG_TLB_REP 1`
471			`#endif`
472
473			`#ifndef CONFIG_DSU_ENABLE`
474			`#define CONFIG_DSU_ENABLE 0`
475			`#endif`
476
477			`#if defined CONFIG_DSU_ITRACESZ1`
478			`#define CFG_DSU_ITB 1`
479			`#elif CONFIG_DSU_ITRACESZ2`
480			`#define CFG_DSU_ITB 2`
481			`#elif CONFIG_DSU_ITRACESZ4`
482			`#define CFG_DSU_ITB 4`
483			`#elif CONFIG_DSU_ITRACESZ8`
484			`#define CFG_DSU_ITB 8`
485			`#elif CONFIG_DSU_ITRACESZ16`
486			`#define CFG_DSU_ITB 16`
487			`#else`
488			`#define CFG_DSU_ITB 0`
489			`#endif`
490
491			`#if defined CONFIG_DSU_ATRACESZ1`
492			`#define CFG_DSU_ATB 1`
493			`#elif CONFIG_DSU_ATRACESZ2`
494			`#define CFG_DSU_ATB 2`
495			`#elif CONFIG_DSU_ATRACESZ4`
496			`#define CFG_DSU_ATB 4`
497			`#elif CONFIG_DSU_ATRACESZ8`
498			`#define CFG_DSU_ATB 8`
499			`#elif CONFIG_DSU_ATRACESZ16`
500			`#define CFG_DSU_ATB 16`
501			`#else`
502			`#define CFG_DSU_ATB 0`
503			`#endif`
504
505			`#ifndef CONFIG_LEON3FT_EN`
506			`#define CONFIG_LEON3FT_EN 0`
507			`#endif`
508
509			`#if defined CONFIG_IUFT_PAR`
510			`#define CONFIG_IUFT_EN 1`
511			`#elif defined CONFIG_IUFT_DMR`
512			`#define CONFIG_IUFT_EN 2`
513			`#elif defined CONFIG_IUFT_BCH`
514			`#define CONFIG_IUFT_EN 3`
515			`#elif defined CONFIG_IUFT_TMR`
516			`#define CONFIG_IUFT_EN 4`
517			`#else`
518			`#define CONFIG_IUFT_EN 0`
519			`#endif`
520			`#ifndef CONFIG_RF_ERRINJ`
521			`#define CONFIG_RF_ERRINJ 0`
522			`#endif`
523
524			`#ifndef CONFIG_FPUFT_EN`
525			`#define CONFIG_FPUFT 0`
526			`#else`
527			`#ifdef CONFIG_FPU_GRFPU`
528			`#define CONFIG_FPUFT 2`
529			`#else`
530			`#define CONFIG_FPUFT 1`
531			`#endif`
532			`#endif`
533
534			`#ifndef CONFIG_CACHE_FT_EN`
535			`#define CONFIG_CACHE_FT_EN 0`
536			`#endif`
537			`#ifndef CONFIG_CACHE_ERRINJ`
538			`#define CONFIG_CACHE_ERRINJ 0`
539			`#endif`
540
541			`#ifndef CONFIG_LEON3_NETLIST`
542			`#define CONFIG_LEON3_NETLIST 0`
543			`#endif`
544
545			`#ifdef CONFIG_DEBUG_PC32`
546			`#define CFG_DEBUG_PC32 0`
547			`#else`
548			`#define CFG_DEBUG_PC32 2`
549			`#endif`
550			`#ifndef CONFIG_IU_DISAS`
551			`#define CONFIG_IU_DISAS 0`
552			`#endif`
553			`#ifndef CONFIG_IU_DISAS_NET`
554			`#define CONFIG_IU_DISAS_NET 0`
555			`#endif`
556
557
558			`#ifndef CONFIG_AHB_SPLIT`
559			`#define CONFIG_AHB_SPLIT 0`
560			`#endif`
561
562			`#ifndef CONFIG_AHB_RROBIN`
563			`#define CONFIG_AHB_RROBIN 0`
564			`#endif`
565
566			`#ifndef CONFIG_AHB_IOADDR`
567			`#define CONFIG_AHB_IOADDR FFF`
568			`#endif`
569
570			`#ifndef CONFIG_APB_HADDR`
571			`#define CONFIG_APB_HADDR 800`
572			`#endif`
573
574			`#ifndef CONFIG_AHB_MON`
575			`#define CONFIG_AHB_MON 0`
576			`#endif`
577
578			`#ifndef CONFIG_AHB_MONERR`
579			`#define CONFIG_AHB_MONERR 0`
580			`#endif`
581
582			`#ifndef CONFIG_AHB_MONWAR`
583			`#define CONFIG_AHB_MONWAR 0`
584			`#endif`
585
586			`#ifndef CONFIG_DSU_UART`
587			`#define CONFIG_DSU_UART 0`
588			`#endif`
589
590
591			`#ifndef CONFIG_DSU_JTAG`
592			`#define CONFIG_DSU_JTAG 0`
593			`#endif`
594
595			`#ifndef CONFIG_MCTRL_LEON2`
596			`#define CONFIG_MCTRL_LEON2 0`
597			`#endif`
598
599			`#ifndef CONFIG_MCTRL_SDRAM`
600			`#define CONFIG_MCTRL_SDRAM 0`
601			`#endif`
602
603			`#ifndef CONFIG_MCTRL_SDRAM_SEPBUS`
604			`#define CONFIG_MCTRL_SDRAM_SEPBUS 0`
605			`#endif`
606
607			`#ifndef CONFIG_MCTRL_SDRAM_INVCLK`
608			`#define CONFIG_MCTRL_SDRAM_INVCLK 0`
609			`#endif`
610
611			`#ifndef CONFIG_MCTRL_SDRAM_BUS64`
612			`#define CONFIG_MCTRL_SDRAM_BUS64 0`
613			`#endif`
614
615			`#ifndef CONFIG_MCTRL_8BIT`
616			`#define CONFIG_MCTRL_8BIT 0`
617			`#endif`
618
619			`#ifndef CONFIG_MCTRL_16BIT`
620			`#define CONFIG_MCTRL_16BIT 0`
621			`#endif`
622
623			`#ifndef CONFIG_MCTRL_5CS`
624			`#define CONFIG_MCTRL_5CS 0`
625			`#endif`
626
627			`#ifndef CONFIG_MCTRL_EDAC`
628			`#define CONFIG_MCTRL_EDAC 0`
629			`#endif`
630
631			`#ifndef CONFIG_MCTRL_PAGE`
632			`#define CONFIG_MCTRL_PAGE 0`
633			`#endif`
634
635			`#ifndef CONFIG_MCTRL_PROGPAGE`
636			`#define CONFIG_MCTRL_PROGPAGE 0`
637			`#endif`
638
639			`#ifndef CONFIG_DDRSP`
640			`#define CONFIG_DDRSP 0`
641			`#endif`
642
643			`#ifndef CONFIG_DDRSP_INIT`
644			`#define CONFIG_DDRSP_INIT 0`
645			`#endif`
646
647			`#ifndef CONFIG_DDRSP_FREQ`
648			`#define CONFIG_DDRSP_FREQ 100`
649			`#endif`
650
651			`#ifndef CONFIG_DDRSP_COL`
652			`#define CONFIG_DDRSP_COL 9`
653			`#endif`
654
655			`#ifndef CONFIG_DDRSP_MBYTE`
656			`#define CONFIG_DDRSP_MBYTE 8`
657			`#endif`
658
659			`#ifndef CONFIG_DDRSP_RSKEW`
660			`#define CONFIG_DDRSP_RSKEW 0`
661			`#endif`
662			`#ifndef CONFIG_AHBSTAT_ENABLE`
663			`#define CONFIG_AHBSTAT_ENABLE 0`
664			`#endif`
665
666			`#ifndef CONFIG_AHBSTAT_NFTSLV`
667			`#define CONFIG_AHBSTAT_NFTSLV 1`
668			`#endif`
669
670
671			`#ifndef CONFIG_AHBRAM_ENABLE`
672			`#define CONFIG_AHBRAM_ENABLE 0`
673			`#endif`
674
675			`#ifndef CONFIG_AHBRAM_START`
676			`#define CONFIG_AHBRAM_START A00`
677			`#endif`
678
679			`#if defined CONFIG_AHBRAM_SZ1`
680			`#define CFG_AHBRAMSZ 1`
681			`#elif CONFIG_AHBRAM_SZ2`
682			`#define CFG_AHBRAMSZ 2`
683			`#elif CONFIG_AHBRAM_SZ4`
684			`#define CFG_AHBRAMSZ 4`
685			`#elif CONFIG_AHBRAM_SZ8`
686			`#define CFG_AHBRAMSZ 8`
687			`#elif CONFIG_AHBRAM_SZ16`
688			`#define CFG_AHBRAMSZ 16`
689			`#elif CONFIG_AHBRAM_SZ32`
690			`#define CFG_AHBRAMSZ 32`
691			`#elif CONFIG_AHBRAM_SZ64`
692			`#define CFG_AHBRAMSZ 64`
693			`#else`
694			`#define CFG_AHBRAMSZ 1`
695			`#endif`
696
697			`#if defined CONFIG_PCI_SIMPLE_TARGET`
698			`#define CFG_PCITYPE 1`
699			`#elif defined CONFIG_PCI_MASTER_TARGET_DMA`
700			`#define CFG_PCITYPE 3`
701			`#elif defined CONFIG_PCI_MASTER_TARGET`
702			`#define CFG_PCITYPE 2`
703			`#else`
704			`#define CFG_PCITYPE 0`
705			`#endif`
706
707			`#ifndef CONFIG_PCI_VENDORID`
708			`#define CONFIG_PCI_VENDORID 0`
709			`#endif`
710
711			`#ifndef CONFIG_PCI_DEVICEID`
712			`#define CONFIG_PCI_DEVICEID 0`
713			`#endif`
714
715			`#ifndef CONFIG_PCI_REVID`
716			`#define CONFIG_PCI_REVID 0`
717			`#endif`
718
719			`#if defined CONFIG_PCI_FIFO0`
720			`#define CFG_PCIFIFO 8`
721			`#define CFG_PCI_ENFIFO 0`
722			`#elif defined CONFIG_PCI_FIFO16`
723			`#define CFG_PCIFIFO 16`
724			`#elif defined CONFIG_PCI_FIFO32`
725			`#define CFG_PCIFIFO 32`
726			`#elif defined CONFIG_PCI_FIFO64`
727			`#define CFG_PCIFIFO 64`
728			`#elif defined CONFIG_PCI_FIFO128`
729			`#define CFG_PCIFIFO 128`
730			`#elif defined CONFIG_PCI_FIFO256`
731			`#define CFG_PCIFIFO 256`
732			`#else`
733			`#define CFG_PCIFIFO 8`
734			`#endif`
735
736			`#ifndef CFG_PCI_ENFIFO`
737			`#define CFG_PCI_ENFIFO 1`
738			`#endif`
739
740			`#ifndef CONFIG_PCI_TRACE`
741			`#define CONFIG_PCI_TRACE 0`
742			`#endif`
743
744			`#if defined CONFIG_PCI_TRACE512`
745			`#define CFG_PCI_TRACEBUF 512`
746			`#elif defined CONFIG_PCI_TRACE1024`
747			`#define CFG_PCI_TRACEBUF 1024`
748			`#elif defined CONFIG_PCI_TRACE2048`
749			`#define CFG_PCI_TRACEBUF 2048`
750			`#elif defined CONFIG_PCI_TRACE4096`
751			`#define CFG_PCI_TRACEBUF 4096`
752			`#else`
753			`#define CFG_PCI_TRACEBUF 256`
754			`#endif`
755
756
757			`#ifndef CONFIG_UART1_ENABLE`
758			`#define CONFIG_UART1_ENABLE 0`
759			`#endif`
760
761			`#if defined CONFIG_UA1_FIFO1`
762			`#define CFG_UA1_FIFO 1`
763			`#elif defined CONFIG_UA1_FIFO2`
764			`#define CFG_UA1_FIFO 2`
765			`#elif defined CONFIG_UA1_FIFO4`
766			`#define CFG_UA1_FIFO 4`
767			`#elif defined CONFIG_UA1_FIFO8`
768			`#define CFG_UA1_FIFO 8`
769			`#elif defined CONFIG_UA1_FIFO16`
770			`#define CFG_UA1_FIFO 16`
771			`#elif defined CONFIG_UA1_FIFO32`
772			`#define CFG_UA1_FIFO 32`
773			`#else`
774			`#define CFG_UA1_FIFO 1`
775			`#endif`
776
777			`#ifndef CONFIG_IRQ3_ENABLE`
778			`#define CONFIG_IRQ3_ENABLE 0`
779			`#endif`
780			`#ifndef CONFIG_GPT_ENABLE`
781			`#define CONFIG_GPT_ENABLE 0`
782			`#endif`
783
784			`#ifndef CONFIG_GPT_NTIM`
785			`#define CONFIG_GPT_NTIM 1`
786			`#endif`
787
788			`#ifndef CONFIG_GPT_SW`
789			`#define CONFIG_GPT_SW 8`
790			`#endif`
791
792			`#ifndef CONFIG_GPT_TW`
793			`#define CONFIG_GPT_TW 8`
794			`#endif`
795
796			`#ifndef CONFIG_GPT_IRQ`
797			`#define CONFIG_GPT_IRQ 8`
798			`#endif`
799
800			`#ifndef CONFIG_GPT_SEPIRQ`
801			`#define CONFIG_GPT_SEPIRQ 0`
802			`#endif`
803			`#ifndef CONFIG_GPT_ENABLE`
804			`#define CONFIG_GPT_ENABLE 0`
805			`#endif`
806
807			`#ifndef CONFIG_GPT_NTIM`
808			`#define CONFIG_GPT_NTIM 1`
809			`#endif`
810
811			`#ifndef CONFIG_GPT_SW`
812			`#define CONFIG_GPT_SW 8`
813			`#endif`
814
815			`#ifndef CONFIG_GPT_TW`
816			`#define CONFIG_GPT_TW 8`
817			`#endif`
818
819			`#ifndef CONFIG_GPT_IRQ`
820			`#define CONFIG_GPT_IRQ 8`
821			`#endif`
822
823			`#ifndef CONFIG_GPT_SEPIRQ`
824			`#define CONFIG_GPT_SEPIRQ 0`
825			`#endif`
826
827			`#ifndef CONFIG_GPT_WDOGEN`
828			`#define CONFIG_GPT_WDOGEN 0`
829			`#endif`
830
831			`#ifndef CONFIG_GPT_WDOG`
832			`#define CONFIG_GPT_WDOG 0`
833			`#endif`
834
835			`#ifndef CONFIG_GRGPIO_ENABLE`
836			`#define CONFIG_GRGPIO_ENABLE 0`
837			`#endif`
838			`#ifndef CONFIG_GRGPIO_IMASK`
839			`#define CONFIG_GRGPIO_IMASK 0000`
840			`#endif`
841			`#ifndef CONFIG_GRGPIO_WIDTH`
842			`#define CONFIG_GRGPIO_WIDTH 1`
843			`#endif`
844
845
846			`#ifndef CONFIG_DEBUG_UART`
847			`#define CONFIG_DEBUG_UART 0`
848			`#endif`