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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<meta http-equiv="CONTENT-TYPE" content="text/html; charset=iso-8859-1"><title>LEON3MP Reference Design</title>
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<meta name="CREATED" content="20040423;18351200">
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<meta name="CHANGED" content="20040426;16351800"></head>
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<body dir="ltr" lang="en-US">
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<table border="0" cellpadding="2" cellspacing="2" width="750">
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<tbody>
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<tr>
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<td valign="top">
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<h3><span style="font-family: helvetica,arial,sans-serif;">LEON3MP
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reference design for the GR-XS3C-1500 board<br>
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</span></h3>
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<h4 style="font-family: helvetica,arial,sans-serif;">Introduction</h4>
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<small><span style="font-family: helvetica,arial,sans-serif;">The
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LEON3MP is a generic reference
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design for LEON3-based systems. This version is specially adapted for
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the <a href="http://www.pender.ch/">GR-XC3S-1500 Spartan3 development board</a>, and contains the following
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functionality:<br>
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<br>
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</span></small>
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<table border="0" cellpadding="2" cellspacing="2" width="700">
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<tbody>
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<tr>
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<td valign="top">
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<ul><li><small><span style="font-family: helvetica,arial,sans-serif;">1 -
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4 LEON3 processor
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cores with MP support</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Multi-processor
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debug support unit (DSU)<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">8-bit
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PROM controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit SDRAM controller<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Round-robin
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AHB arbiter/controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">AHB/APB bridge with
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plug&play support<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Multi-processor
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interrupt controller</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">32-bit modular timer
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unit</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">1 -
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2 UARTs with FIFO<br>
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</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">10/100 ethernet MAC</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">PS2 mouse/keyboard interface</span></small></li>
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<li><small><span style="font-family: helvetica,arial,sans-serif;">24-bit Video DAC interface<br>
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</span></small></li>
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<li><small><span style="font-family: helvetica,arial,sans-serif;">Serial debug
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communication link</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">Etherner debug
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communication link</span></small></li><li><small><span style="font-family: helvetica,arial,sans-serif;">JTAG debug communication link</span></small></li></ul>
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</td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"><img alt="" src="../../boards/gr-xc3s-1500/gr-xc3s_top_small.jpg" align="right" height="212" width="320"></span></small></td>
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</tr>
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</tbody>
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</table>
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<small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
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<br>
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The LEON3MP-GR-XS3C-1500 design is provided together with GRLIB, and is
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located in grlib/designs/leon3-gr-xc3s-1500 .<br>
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</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
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</span></small>
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<h4><span style="font-family: helvetica,arial,sans-serif;">Reference
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architecture</span></h4>
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<small><span style="font-family: helvetica,arial,sans-serif;">The
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LEON3MP is made up by cores from the GRLIB IP library, which are
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connected together via the AMBA AHB and APB buses. The plug&play
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configuration method of GRLIB makes it possible to assign any
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combination of addresses and interrupts to the cores. However, to be
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software compatible with simple operating systems such as the LEON
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Bare-C cross-compiler, some of the vital cores must be assigned to
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predefined addresses and interrupts. The table below shows the
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reference assigment in the LEON3MP design:<br>
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<br>
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</span></small>
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<table style="width: 100%; text-align: left;" border="1" cellpadding="2" cellspacing="2">
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<tbody>
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<tr>
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<th style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Core</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory area<br>
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</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt</span></small></th>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">PROM/SDRAM controller<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x00000000 -
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0x20000000 : 8 Mbyte 8-bit flash PROM<br>
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0x40000000 - 0x80000000 : 64 Mbyte 32-bit SDRAM<br>
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0x80000000 - 0x80000100 : Configuration registers (APB)<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">APB bridge<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000000 -
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0x80100000 : APB bus<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">UART</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000100 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000200 : UART1
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registers</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">2</span></small><br>
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</td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt controller</span></small><br>
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</td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000200 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000300 : IRQ
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registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Timer unit<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000300</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0x80000400 : timer
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registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">8, 9<br>
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</span></small></td>
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</tr>
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<tr>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">LEON3 debug support
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unit (DSU)<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x90000000 -
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0xA0000000 : DSU registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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</tbody>
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</table>
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<small><span style="font-family: helvetica,arial,sans-serif;"><br>
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Additional (optional) IP cores are assigned addresses and interrupts as
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desribed in the table below. These assignments are LEON3MP specific and
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can be changed without impact on software compatibility.<br>
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<br>
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</span></small>
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<table style="width: 100%; text-align: left;" border="1" cellpadding="2" cellspacing="2">
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<tbody>
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<tr>
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<th style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Core</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Memory area<br>
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</span></small></th>
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<th style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">Interrupt</span></small></th>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Serial debug
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communication link<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000700 - </span></small><small><span style="font-family: helvetica,arial,sans-serif;">0x80000800 : AHB UART
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registers</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small> </td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">Ethernet debug
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communication link</span></small><br>
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</td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small> </td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">JTAG debug
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communication link</span></small></td>
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<td valign="top">-<br>
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</td>
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<td valign="top">-<br>
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</td>
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</tr>
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<tr>
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<td style="vertical-align: top; width: 250px;"><small><span style="font-family: helvetica,arial,sans-serif;">10/100 Mbit ethernet MAC<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xFFFB0000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0xFFFB1000 :
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ethernet
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control registers<br>
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</span></small></td>
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<td style="vertical-align: top;"><small><span style="font-family: helvetica,arial,sans-serif;">12</span></small></td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">On-chip RAM<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">0xA0000000</span></small><small><span style="font-family: helvetica,arial,sans-serif;"> -</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> 0xA0100000 : On-chip
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RAM<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">UART</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000900 -
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0x80000A00 : Secondary UART<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">3</span></small></td>
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</tr><tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">PS/2 Keyboard interface</span></small><br>
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</td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000500 -
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0x80000600 : PS/2 registers<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">4</span></small><br>
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</td>
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</tr>
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<tr>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">VGA controller<br>
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</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">0x80000600 -
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0x80000700 : VGA registers</span></small></td>
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<td valign="top"><small><span style="font-family: helvetica,arial,sans-serif;">-</span></small></td>
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</tr>
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</tbody>
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</table>
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<br>
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<h4><small><span style="font-family: helvetica,arial,sans-serif;">
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</span></small></h4>
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<h4><span style="font-family: helvetica,arial,sans-serif;">Configuration</span></h4>
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<div style="text-align: left;"><small><span style="font-family: helvetica,arial,sans-serif;">The configuartion of
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the LEON3MP design is defined through the config package located <a href="config.vhd">config.vhd</a>.
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This file can be automatically generated using a GUI based on tkconfig.
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To launch the GUI, do 'make xconfig'. After the configuration is
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completed, save and
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exit the tool and config.vhd will be created automatically.<br>
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<br>
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<img alt="" src="../share/gui.gif" height="148" width="561"><br>
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<br>
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<i>Figure 1. LEON3MP configuration GUI</i></span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><br style="font-family: helvetica,arial,sans-serif;">
|
| 246 |
|
|
<small>
|
| 247 |
|
|
</small></div>
|
| 248 |
|
|
|
| 249 |
|
|
<h4><span style="font-family: helvetica,arial,sans-serif;">Simulation</span></h4>
|
| 250 |
|
|
|
| 251 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">To
|
| 252 |
|
|
simulate the testbench, first compile the model for simulation. This
|
| 253 |
|
|
can be done automatically for three different simulators. Execute one
|
| 254 |
|
|
of the following commands:</span><br style="font-family: helvetica,arial,sans-serif;">
|
| 255 |
|
|
</small>
|
| 256 |
|
|
<ul style="font-family: helvetica,arial,sans-serif;">
|
| 257 |
|
|
<li><small>make vsim</small></li><li><small>make ncsim</small></li><li><small>make ghdl</small></li>
|
| 258 |
|
|
</ul>
|
| 259 |
|
|
|
| 260 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">For vsim,
|
| 261 |
|
|
start the simulation with 'vsim testbench' and do 'run 100'. This
|
| 262 |
|
|
should print the current LEON3MP configuration:</span><br style="font-family: helvetica,arial,sans-serif;">
|
| 263 |
|
|
</small><br>
|
| 264 |
|
|
|
| 265 |
|
|
<small><span style="font-family: courier new,courier,monospace;">$ vsim
|
| 266 |
|
|
-c -quiet testbench</span><br style="font-family: courier new,courier,monospace;">
|
| 267 |
|
|
<span style="font-family: courier new,courier,monospace;">Reading
|
| 268 |
|
|
/usr/local/model58/tcl/vsim/pref.tcl</span><br style="font-family: courier new,courier,monospace;">
|
| 269 |
|
|
<span style="font-family: courier new,courier,monospace;">Reading
|
| 270 |
|
|
/home/jiri/modelsim.tcl</span><br style="font-family: courier new,courier,monospace;">
|
| 271 |
|
|
</small><small><span style="font-family: courier new,courier,monospace;"></span></small><br style="font-family: courier new,courier,monospace;">
|
| 272 |
|
|
|
| 273 |
|
|
<small><span style="font-family: courier new,courier,monospace;"># 5.8</span><br style="font-family: courier new,courier,monospace;">
|
| 274 |
|
|
</small><small><span style="font-family: courier new,courier,monospace;"></span><big><tt>#
|
| 275 |
|
|
VSIM 1> run<br>
|
| 276 |
|
|
# LEON3 Demonstration design<br>
|
| 277 |
|
|
# GRLIB Version 0.13<br>
|
| 278 |
|
|
# Target technology: virtex2 , memory library: virtex2<br>
|
| 279 |
|
|
# ahbctrl: mst0: Gaisler
|
| 280 |
|
|
Research Leon3 SPARC V8
|
| 281 |
|
|
Processor<br>
|
| 282 |
|
|
# ahbctrl: mst1: Gaisler
|
| 283 |
|
|
Research AHB Debug UART<br>
|
| 284 |
|
|
# ahbctrl: mst2: Gaisler
|
| 285 |
|
|
Research Fast 32-bit PCI
|
| 286 |
|
|
Bridge<br>
|
| 287 |
|
|
# ahbctrl: mst3: Gaisler
|
| 288 |
|
|
Research AMBA DMA controller<br>
|
| 289 |
|
|
# ahbctrl: mst5: Gaisler
|
| 290 |
|
|
Research OC ethernet AHB
|
| 291 |
|
|
interface<br>
|
| 292 |
|
|
# ahbctrl: slv0: Gaisler
|
| 293 |
|
|
Research Simple SRAM
|
| 294 |
|
|
Controller<br>
|
| 295 |
|
|
# ahbctrl: memory at 0x00000000,
|
| 296 |
|
|
size 16 Mbyte, cacheable, prefetch<br>
|
| 297 |
|
|
# ahbctrl: memory at 0x40000000,
|
| 298 |
|
|
size 16 Mbyte, cacheable, prefetch<br>
|
| 299 |
|
|
# ahbctrl: slv1: Gaisler
|
| 300 |
|
|
Research AHB/APB Bridge<br>
|
| 301 |
|
|
# ahbctrl: memory at 0x80000000,
|
| 302 |
|
|
size 1 Mbyte<br>
|
| 303 |
|
|
# ahbctrl: slv2: Gaisler
|
| 304 |
|
|
Research Leon3 Debug Support
|
| 305 |
|
|
Unit<br>
|
| 306 |
|
|
# ahbctrl: memory at 0x90000000,
|
| 307 |
|
|
size 256 Mbyte<br>
|
| 308 |
|
|
# ahbctrl: slv4: Gaisler
|
| 309 |
|
|
Research Fast 32-bit PCI
|
| 310 |
|
|
Bridge<br>
|
| 311 |
|
|
# ahbctrl: memory at 0xe0000000,
|
| 312 |
|
|
size 256 Mbyte<br>
|
| 313 |
|
|
# ahbctrl: I/O port at 0xfff80000,
|
| 314 |
|
|
size 128kbyte<br>
|
| 315 |
|
|
# ahbctrl: slv5: Gaisler
|
| 316 |
|
|
Research OC ethernet AHB
|
| 317 |
|
|
interface<br>
|
| 318 |
|
|
# ahbctrl: I/O port at 0xfffb0000,
|
| 319 |
|
|
size 4kbyte<br>
|
| 320 |
|
|
# ahbctrl: slv6: Gaisler
|
| 321 |
|
|
Research OC CAN AHB interface<br>
|
| 322 |
|
|
# ahbctrl: I/O port at 0xfffc0000,
|
| 323 |
|
|
size 4kbyte<br>
|
| 324 |
|
|
# ahbctrl: slv7: Gaisler
|
| 325 |
|
|
Research Generic AHB SRAM
|
| 326 |
|
|
module<br>
|
| 327 |
|
|
# ahbctrl: memory at 0xa0000000,
|
| 328 |
|
|
size 1 Mbyte, cacheable, prefetch<br>
|
| 329 |
|
|
# ahbctrl: AHB arbiter/multiplexer rev 1<br>
|
| 330 |
|
|
# ahbctrl: Common I/O area at 0xfff00000, 1 Mbyte<br>
|
| 331 |
|
|
# ahbctrl: Configuration area at 0xfffff000, 4 kbyte<br>
|
| 332 |
|
|
# apbctrl: APB Bridge at 0x80000000 rev 1<br>
|
| 333 |
|
|
# apbctrl: slv1: Gaisler
|
| 334 |
|
|
Research Generic UART<br>
|
| 335 |
|
|
# apbctrl: I/O ports at 0x80000100,
|
| 336 |
|
|
size 256 byte<br>
|
| 337 |
|
|
# apbctrl: slv2: Gaisler
|
| 338 |
|
|
Research Multi-processor
|
| 339 |
|
|
Interrupt Ctrl.<br>
|
| 340 |
|
|
# apbctrl: I/O ports at 0x80000200,
|
| 341 |
|
|
size 256 byte<br>
|
| 342 |
|
|
# apbctrl: slv3: Gaisler
|
| 343 |
|
|
Research Modular Timer Unit<br>
|
| 344 |
|
|
# apbctrl: I/O ports at 0x80000300,
|
| 345 |
|
|
size 256 byte<br>
|
| 346 |
|
|
# apbctrl: slv4: Gaisler
|
| 347 |
|
|
Research Fast 32-bit PCI
|
| 348 |
|
|
Bridge<br>
|
| 349 |
|
|
# apbctrl: I/O ports at 0x80000400,
|
| 350 |
|
|
size 256 byte<br>
|
| 351 |
|
|
# apbctrl: slv5: Gaisler
|
| 352 |
|
|
Research AMBA DMA controller<br>
|
| 353 |
|
|
# apbctrl: I/O ports at 0x80000500,
|
| 354 |
|
|
size 256 byte<br>
|
| 355 |
|
|
# apbctrl: slv7: Gaisler
|
| 356 |
|
|
Research AHB Debug UART<br>
|
| 357 |
|
|
# apbctrl: I/O ports at 0x80000700,
|
| 358 |
|
|
size 256 byte<br>
|
| 359 |
|
|
# ahbram7: AHB SRAM Module rev 1, 2 kbytes<br>
|
| 360 |
|
|
# can_oc6: Opencores CAN MAC, rev 0, irq 13<br>
|
| 361 |
|
|
# eth_oc5: Wishbone/AHB interface for OC ethernet MAC, irq 12<br>
|
| 362 |
|
|
# eth_oc5: Opencores 10/100 Mbit ethernet MAC, rev 0<br>
|
| 363 |
|
|
# pci_mtf4: 32-bit PCI/AHB bridge rev 0, 2 Mbyte PCI memory BAR,
|
| 364 |
|
|
8-word FIFOs<br>
|
| 365 |
|
|
# dmactrl5: 32-bit DMA controller & AHB/AHB bridge rev 0<br>
|
| 366 |
|
|
# gptimer3: GR Timer Unit rev 0, 16-bit scaler, 1 32-bit timers, irq 8<br>
|
| 367 |
|
|
# irqmp: Multi-processor Interrupt Controller rev 1, #cpu 1<br>
|
| 368 |
|
|
# apbuart1: Generic UART rev 1, irq 2<br>
|
| 369 |
|
|
# srctrl0: 32-bit PROM/SRAM controller rev 0<br>
|
| 370 |
|
|
# ahbuart7: AHB Debug UART rev 0<br>
|
| 371 |
|
|
# dsu3_2: LEON3 Debug support unit<br>
|
| 372 |
|
|
# leon3_0: LEON3 SPARC V8 processor rev 0<br>
|
| 373 |
|
|
# leon3_0: icache 1*4 kbyte, dcache 1*4 kbyte</tt></big><br style="font-family: courier new,courier,monospace;">
|
| 374 |
|
|
<span style="font-family: courier new,courier,monospace;"></span><span style="font-family: courier new,courier,monospace;"></span><br style="font-family: courier new,courier,monospace;">
|
| 375 |
|
|
<span style="font-family: courier new,courier,monospace;">VSIM 2>
|
| 376 |
|
|
run -all<br># **** GRLIB system test starting ****<br>
|
| 377 |
|
|
# Leon3 SPARC V8 Processor<br>
|
| 378 |
|
|
# register file<br>
|
| 379 |
|
|
# multiplier<br>
|
| 380 |
|
|
# radix-2 divider<br>
|
| 381 |
|
|
# cache system<br>
|
| 382 |
|
|
# Multi-processor Interrupt Ctrl.<br>
|
| 383 |
|
|
# Generic UART<br>
|
| 384 |
|
|
# Modular Timer Unit<br>
|
| 385 |
|
|
# Test passed, halting with IU error mode<br>
|
| 386 |
|
|
#<br>
|
| 387 |
|
|
# ** Failure: *** IU in error mode, simulation halted ***<br>
|
| 388 |
|
|
# Time: 669213500 ps Iteration: 1 Process: /testbench/iuerr File: testbench.vhd<br>
|
| 389 |
|
|
# Break at testbench.vhd line 263<br>
|
| 390 |
|
|
# Stopped at testbench.vhd line 263<br>
|
| 391 |
|
|
<br>
|
| 392 |
|
|
</span></small><h4><small><span style="font-family: helvetica,arial,sans-serif;">Synthesis<br>
|
| 393 |
|
|
</span></small></h4>
|
| 394 |
|
|
|
| 395 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
|
| 396 |
|
|
|
| 397 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">To
|
| 398 |
|
|
synthesize and place&route, use the make utility and issue either 'make ise' or 'make ise-synp' to<br>
|
| 399 |
|
|
use the XST or Synplify tools respectively.<br>
|
| 400 |
|
|
<br>
|
| 401 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;">Alternatively, the design can be implemented using
|
| 402 |
|
|
the graphical XGrlib tool, which is started with 'make xgrlib'.<br>
|
| 403 |
|
|
<br>
|
| 404 |
|
|
<br>
|
| 405 |
|
|
<img alt="" src="../../doc/grlib/xgrlib.gif" height="537" width="619"></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> </span></small><br>
|
| 406 |
|
|
|
| 407 |
|
|
<div style="text-align: justify;"><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></div>
|
| 408 |
|
|
|
| 409 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">
|
| 410 |
|
|
<br>
|
| 411 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"><i>Figure 2. XGrlib
|
| 412 |
|
|
implementation tool</i></span></small><br>
|
| 413 |
|
|
|
| 414 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;"><br>
|
| 415 |
|
|
To program the fpga, issue 'make ise-prog-fpga'. To re-program the configuration proms, do 'make ise-prog-prom'.<br>
|
| 416 |
|
|
After programming the proms, power-cycle the board to re-load the fpga.<br>
|
| 417 |
|
|
<br>
|
| 418 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;">To get
|
| 419 |
|
|
started quicker, suitable leon3mp.bit and leon3mp.msk files are provided in the <i>bitfiles</i>
|
| 420 |
|
|
directory. The fpga or
|
| 421 |
|
|
configuration proms can be programmed directly with this configuration,
|
| 422 |
|
|
using the following commands: 'make ise-prog-fpga-ref' or 'make
|
| 423 |
|
|
ise-prog-prom-ref '.</span></small><br>
|
| 424 |
|
|
|
| 425 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">
|
| 426 |
|
|
</span></small>
|
| 427 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;">Software
|
| 428 |
|
|
development</span></small></h4>
|
| 429 |
|
|
|
| 430 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;"></span></small></h4>
|
| 431 |
|
|
|
| 432 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">To
|
| 433 |
|
|
develop RTEMS applications, download and install the <a href="http://www.gaisler.se/bin/linux/rcc-1.0.0.pdf">LEON3 RTEMS
|
| 434 |
|
|
Cross-compiler</a> from gaisler.com. The LEON3 bsp automatically
|
| 435 |
|
|
detects
|
| 436 |
|
|
the location of UARTs, timers, interrupt controller and ethernet core
|
| 437 |
|
|
using the plug&play information. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">
|
| 438 |
|
|
A <a href="http://www.gaisler.com/doc/bcc.html">LEON3 bare-C compiler</a>
|
| 439 |
|
|
is also available for download from gaisler.com. Both the RTEMS
|
| 440 |
|
|
and the bare-C compilers now come with full source code for both the
|
| 441 |
|
|
low-level I/O routines as well as the mkprom prom builder. This should
|
| 442 |
|
|
allow users to adapt the run-time to their own needs. All sources are
|
| 443 |
|
|
provided under GNU GPL, contact <a href="mailto:sales@gaisler.com">Gaisler
|
| 444 |
|
|
Research</a> for commercial licenses of this software.<br>
|
| 445 |
|
|
<br>
|
| 446 |
|
|
A Leon3 port of uClinux and linux-2.6.11 is available in the <a href="http://www.gaisler.com/products/linux.html">snapgear
|
| 447 |
|
|
linux distribution</a>.<br>
|
| 448 |
|
|
</span></small>
|
| 449 |
|
|
<h4><small><span style="font-family: helvetica,arial,sans-serif;">Debugging<br>
|
| 450 |
|
|
</span></small></h4>
|
| 451 |
|
|
|
| 452 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">The
|
| 453 |
|
|
on-chip debug support unit (DSU) makes debugging of target hardware
|
| 454 |
|
|
relatively easy. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">The
|
| 455 |
|
|
design support both serial, ethernet and JTAG debug interface, and the </span></small><small><span style="font-family: helvetica,arial,sans-serif;"> <a href="http://www.gaisler.com/products/grmon/grmon.html">GRMON debug
|
| 456 |
|
|
monitor</a></span></small><small><span style="font-family: helvetica,arial,sans-serif;"> can be attached with a serial cable, over a LAN, or using the Xilinx JTAG programming cable. </span></small><small><span style="font-family: helvetica,arial,sans-serif;"> Note that when you use the ethernet or the JTAG
|
| 457 |
|
|
interface, you need specify the frequency of the AHB clock since it is
|
| 458 |
|
|
not auto-detected. </span></small><small><span style="font-family: helvetica,arial,sans-serif;">Below
|
| 459 |
|
|
is a log from a debug session.<br>
|
| 460 |
|
|
<br>
|
| 461 |
|
|
</span></small><small><span style="font-family: helvetica,arial,sans-serif;"></span></small><small><span style="font-family: helvetica,arial,sans-serif;">
|
| 462 |
|
|
<br style="font-family: courier new,courier,monospace;">
|
| 463 |
|
|
<span style="font-family: courier new,courier,monospace;">$jiri@home:~$ grmon -u -grlib -jtag -freq 40<br>
|
| 464 |
|
|
<br>
|
| 465 |
|
|
GRMON - The LEON multi purpose monitor v1.0.9<br>
|
| 466 |
|
|
<br>
|
| 467 |
|
|
Copyright (C) 2004, Gaisler Research - all rights reserved.<br>
|
| 468 |
|
|
For latest updates, go to http://www.gaisler.com/<br>
|
| 469 |
|
|
Comments or bug-reports to grmon@gaisler.com<br>
|
| 470 |
|
|
<br>
|
| 471 |
|
|
<br>
|
| 472 |
|
|
GRLIB DSU Monitor backend 1.0.2 (professional version)<br>
|
| 473 |
|
|
<br>
|
| 474 |
|
|
using JTAG cable on parallel port<br>
|
| 475 |
|
|
<br>
|
| 476 |
|
|
initialising .............<br>
|
| 477 |
|
|
<br> Component
|
| 478 |
|
|
Vendor<br>
|
| 479 |
|
|
Leon3 SPARC V8 Processor Gaisler Research<br>
|
| 480 |
|
|
AHB Debug
|
| 481 |
|
|
UART
|
| 482 |
|
|
Gaisler Research<br>
|
| 483 |
|
|
AHB Debug JTAG
|
| 484 |
|
|
TAP
|
| 485 |
|
|
Gaisler Research<br>
|
| 486 |
|
|
AHB interface for 10/100 Mbit MA Gaisler Research<br>
|
| 487 |
|
|
Nuhorizons Spartan3 I/O interfac Gaisler Research<br>
|
| 488 |
|
|
AHB/APB
|
| 489 |
|
|
Bridge
|
| 490 |
|
|
Gaisler Research<br>
|
| 491 |
|
|
Leon3 Debug Support Unit Gaisler Research<br>
|
| 492 |
|
|
32-bit PC133 SDRAM Controller Gaisler Research<br>
|
| 493 |
|
|
AHB interface for 10/100 Mbit MA Gaisler Research<br>
|
| 494 |
|
|
CAN
|
| 495 |
|
|
controller
|
| 496 |
|
|
Gaisler Research<br>
|
| 497 |
|
|
Generic APB
|
| 498 |
|
|
UART
|
| 499 |
|
|
Gaisler Research<br>
|
| 500 |
|
|
Multi-processor Interrupt Ctrl Gaisler Research<br>
|
| 501 |
|
|
Modular Timer
|
| 502 |
|
|
Unit
|
| 503 |
|
|
Gaisler Research<br>
|
| 504 |
|
|
<br>
|
| 505 |
|
|
Use command 'info sys' to print a detailed report of attached cores<br>
|
| 506 |
|
|
<br>
|
| 507 |
|
|
grmon[grlib]> inf sys<br>
|
| 508 |
|
|
00.01:003 Gaisler Research Leon3 SPARC V8 Processor (ver 0)<br>
|
| 509 |
|
|
ahb master 0<br>
|
| 510 |
|
|
01.01:007 Gaisler Research AHB Debug UART (ver 0)<br>
|
| 511 |
|
|
ahb master 1<br>
|
| 512 |
|
|
apb: 80000700 - 80000800<br>
|
| 513 |
|
|
baud rate 115200, ahb frequency 40.00<br>
|
| 514 |
|
|
02.01:01c Gaisler Research AHB Debug JTAG TAP (ver 0)<br>
|
| 515 |
|
|
ahb master 2<br>
|
| 516 |
|
|
03.01:005 Gaisler Research AHB interface for 10/100 Mbit MA (ver 0)<br>
|
| 517 |
|
|
ahb master 3<br>
|
| 518 |
|
|
00.01:02b Gaisler Research Nuhorizons Spartan3 I/O interfac (ver 0)<br>
|
| 519 |
|
|
ahb: 00000000 - 00400000<br>
|
| 520 |
|
|
16-bit prom @ 0x00000000<br>
|
| 521 |
|
|
01.01:006 Gaisler Research AHB/APB Bridge (ver 0)<br>
|
| 522 |
|
|
ahb: 80000000 - 80100000<br>
|
| 523 |
|
|
02.01:004 Gaisler Research Leon3 Debug Support Unit (ver 0)<br>
|
| 524 |
|
|
ahb: 90000000 - a0000000<br>
|
| 525 |
|
|
AHB trace 64 lines, stack pointer 0x00000000<br>
|
| 526 |
|
|
CPU#0 win 8, hwbp 4, itrace 64, V8 mul/div, lddel 1<br>
|
| 527 |
|
|
|
| 528 |
|
|
icache 2 * 4 kbyte, 32 byte/line lru<br>
|
| 529 |
|
|
|
| 530 |
|
|
dcache 2 * 4 kbyte, 32 byte/line lru<br>
|
| 531 |
|
|
03.01:009 Gaisler Research 32-bit PC133 SDRAM Controller (ver 0)<br>
|
| 532 |
|
|
ahb: 40000000 - 48000000<br>
|
| 533 |
|
|
ahb: fff00100 - fff00200<br>
|
| 534 |
|
|
|
| 535 |
|
|
32-bit sdram: 1 * 16 Mbyte @ 0x40000000, col 8, cas 2, ref 15.6 us<br>
|
| 536 |
|
|
05.01:005 Gaisler Research AHB interface for 10/100 Mbit MA (ver 0)<br>
|
| 537 |
|
|
irq 12<br>
|
| 538 |
|
|
ahb: fffb0000 - fffb1000<br>
|
| 539 |
|
|
06.01:019 Gaisler Research CAN controller (ver 0)<br>
|
| 540 |
|
|
irq 13<br>
|
| 541 |
|
|
ahb: fffc0000 - fffc1000<br>
|
| 542 |
|
|
01.01:00c Gaisler Research Generic APB UART (ver 1)<br>
|
| 543 |
|
|
irq 2<br>
|
| 544 |
|
|
apb: 80000100 - 80000200<br>
|
| 545 |
|
|
baud rate 38400, DSU mode<br>
|
| 546 |
|
|
02.01:00d Gaisler Research Multi-processor Interrupt Ctrl (ver 2)<br>
|
| 547 |
|
|
apb: 80000200 - 80000300<br>
|
| 548 |
|
|
03.01:011 Gaisler Research Modular Timer Unit (ver 0)<br>
|
| 549 |
|
|
irq 8<br>
|
| 550 |
|
|
apb: 80000300 - 80000400<br>
|
| 551 |
|
|
8-bit scaler, 2 * 32-bit timers, divisor 40<br>
|
| 552 |
|
|
grmon[grlib]> lo /opt/sparc-elf/src/examples/stanford<br>
|
| 553 |
|
|
section: .text at 0x40000000, size 61200 bytes<br>
|
| 554 |
|
|
section: .data at 0x4000ef10, size 2080 bytes<br>
|
| 555 |
|
|
total size: 63280 bytes (222.1 kbit/s)<br>
|
| 556 |
|
|
read 197 symbols<br>
|
| 557 |
|
|
entry point: 0x40000000<br>
|
| 558 |
|
|
grmon[grlib]> run<br>
|
| 559 |
|
|
Starting<br>
|
| 560 |
|
|
Perm Towers Queens
|
| 561 |
|
|
Intmm Mm Puzzle
|
| 562 |
|
|
Quick Bubble Tree FFT<br>
|
| 563 |
|
|
34
|
| 564 |
|
|
50 34
|
| 565 |
|
|
34 900
|
| 566 |
|
|
316 34
|
| 567 |
|
|
50 217 1083<br>
|
| 568 |
|
|
<br>
|
| 569 |
|
|
Nonfloating point composite is 114<br>
|
| 570 |
|
|
<br>
|
| 571 |
|
|
Floating point composite is 857<br>
|
| 572 |
|
|
<br>
|
| 573 |
|
|
Program exited normally.<br>
|
| 574 |
|
|
grmon[grlib]></span><span style="font-family: courier new,courier,monospace;"></span><br>
|
| 575 |
|
|
<br>
|
| 576 |
|
|
<br>
|
| 577 |
|
|
The LEON3MP test bench includes memory models of both boot-prom, sram
|
| 578 |
|
|
and sdram. To build memory images for these models, do 'make soft' .
|
| 579 |
|
|
Note: this will require that the bare-C compiler for LEON3 is
|
| 580 |
|
|
installed,
|
| 581 |
|
|
and /opt/sparc-elf/bin is added to the PATH.<br>
|
| 582 |
|
|
<br>
|
| 583 |
|
|
<br>
|
| 584 |
|
|
</span></small></td>
|
| 585 |
|
|
</tr>
|
| 586 |
|
|
<tr>
|
| 587 |
|
|
<td valign="top"><br>
|
| 588 |
|
|
</td>
|
| 589 |
|
|
</tr>
|
| 590 |
|
|
</tbody>
|
| 591 |
|
|
</table>
|
| 592 |
|
|
<h3><br>
|
| 593 |
|
|
<span style="font-family: helvetica,arial,sans-serif;"></span></h3>
|
| 594 |
|
|
<small><span style="font-family: helvetica,arial,sans-serif;">
|
| 595 |
|
|
</span></small>
|
| 596 |
|
|
</body></html>
|
