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URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-gr-xc3s-1500/] [compile.dc] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali 
sh mkdir synopsys
2 
sh mkdir synopsys/grlib
3 
define_design_lib grlib -path synopsys/grlib
4 
analyze -f VHDL -library grlib ../../lib/grlib/stdlib/version.vhd
5 
analyze -f VHDL -library grlib ../../lib/grlib/stdlib/stdlib.vhd
6 
analyze -f VHDL -library grlib ../../lib/grlib/sparc/sparc.vhd
7 
analyze -f VHDL -library grlib ../../lib/grlib/modgen/multlib.vhd
8 
analyze -f VHDL -library grlib ../../lib/grlib/modgen/leaves.vhd
9 
analyze -f VHDL -library grlib ../../lib/grlib/amba/amba.vhd
10 
analyze -f VHDL -library grlib ../../lib/grlib/amba/devices.vhd
11 
analyze -f VHDL -library grlib ../../lib/grlib/amba/defmst.vhd
12 
analyze -f VHDL -library grlib ../../lib/grlib/amba/apbctrl.vhd
13 
analyze -f VHDL -library grlib ../../lib/grlib/amba/ahbctrl.vhd
14 
analyze -f VHDL -library grlib ../../lib/grlib/amba/dma2ahb_pkg.vhd
15 
analyze -f VHDL -library grlib ../../lib/grlib/amba/dma2ahb.vhd
16 
sh mkdir synopsys/unisim
17 
define_design_lib unisim -path synopsys/unisim
18 
sh mkdir synopsys/synplify
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define_design_lib synplify -path synopsys/synplify
20 
sh mkdir synopsys/techmap
21 
define_design_lib techmap -path synopsys/techmap
22 
analyze -f VHDL -library techmap ../../lib/techmap/gencomp/gencomp.vhd
23 
analyze -f VHDL -library techmap ../../lib/techmap/gencomp/netcomp.vhd
24 
analyze -f VHDL -library techmap ../../lib/techmap/inferred/memory_inferred.vhd
25 
analyze -f VHDL -library techmap ../../lib/techmap/inferred/ddr_inferred.vhd
26 
analyze -f VHDL -library techmap ../../lib/techmap/inferred/mul_inferred.vhd
27 
analyze -f VHDL -library techmap ../../lib/techmap/inferred/ddr_phy_inferred.vhd
28 
analyze -f VHDL -library techmap ../../lib/techmap/dw02/mul_dw_gen.vhd
29 
analyze -f VHDL -library techmap ../../lib/techmap/maps/allclkgen.vhd
30 
analyze -f VHDL -library techmap ../../lib/techmap/maps/allddr.vhd
31 
analyze -f VHDL -library techmap ../../lib/techmap/maps/allmem.vhd
32 
analyze -f VHDL -library techmap ../../lib/techmap/maps/allpads.vhd
33 
analyze -f VHDL -library techmap ../../lib/techmap/maps/alltap.vhd
34 
analyze -f VHDL -library techmap ../../lib/techmap/maps/clkgen.vhd
35 
analyze -f VHDL -library techmap ../../lib/techmap/maps/clkmux.vhd
36 
analyze -f VHDL -library techmap ../../lib/techmap/maps/clkand.vhd
37 
analyze -f VHDL -library techmap ../../lib/techmap/maps/ddr_ireg.vhd
38 
analyze -f VHDL -library techmap ../../lib/techmap/maps/ddr_oreg.vhd
39 
analyze -f VHDL -library techmap ../../lib/techmap/maps/ddrphy.vhd
40 
analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram.vhd
41 
analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram64.vhd
42 
analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram_2p.vhd
43 
analyze -f VHDL -library techmap ../../lib/techmap/maps/syncram_dp.vhd
44 
analyze -f VHDL -library techmap ../../lib/techmap/maps/syncfifo.vhd
45 
analyze -f VHDL -library techmap ../../lib/techmap/maps/regfile_3p.vhd
46 
analyze -f VHDL -library techmap ../../lib/techmap/maps/tap.vhd
47 
analyze -f VHDL -library techmap ../../lib/techmap/maps/techbuf.vhd
48 
analyze -f VHDL -library techmap ../../lib/techmap/maps/clkpad.vhd
49 
analyze -f VHDL -library techmap ../../lib/techmap/maps/clkpad_ds.vhd
50 
analyze -f VHDL -library techmap ../../lib/techmap/maps/inpad.vhd
51 
analyze -f VHDL -library techmap ../../lib/techmap/maps/inpad_ds.vhd
52 
analyze -f VHDL -library techmap ../../lib/techmap/maps/iodpad.vhd
53 
analyze -f VHDL -library techmap ../../lib/techmap/maps/iopad.vhd
54 
analyze -f VHDL -library techmap ../../lib/techmap/maps/iopad_ds.vhd
55 
analyze -f VHDL -library techmap ../../lib/techmap/maps/lvds_combo.vhd
56 
analyze -f VHDL -library techmap ../../lib/techmap/maps/odpad.vhd
57 
analyze -f VHDL -library techmap ../../lib/techmap/maps/outpad.vhd
58 
analyze -f VHDL -library techmap ../../lib/techmap/maps/outpad_ds.vhd
59 
analyze -f VHDL -library techmap ../../lib/techmap/maps/toutpad.vhd
60 
analyze -f VHDL -library techmap ../../lib/techmap/maps/skew_outpad.vhd
61 
analyze -f VHDL -library techmap ../../lib/techmap/maps/grspwc_net.vhd
62 
analyze -f VHDL -library techmap ../../lib/techmap/maps/grlfpw_net.vhd
63 
analyze -f VHDL -library techmap ../../lib/techmap/maps/grfpw_net.vhd
64 
analyze -f VHDL -library techmap ../../lib/techmap/maps/mul_61x61.vhd
65 
analyze -f VHDL -library techmap ../../lib/techmap/maps/cpu_disas_net.vhd
66 
analyze -f VHDL -library techmap ../../lib/techmap/maps/grusbhc_net.vhd
67 
analyze -f VHDL -library techmap ../../lib/techmap/maps/ringosc.vhd
68 
analyze -f VHDL -library techmap ../../lib/techmap/maps/ssrctrl_net.vhd
69 
sh mkdir synopsys/spw
70 
define_design_lib spw -path synopsys/spw
71 
analyze -f VHDL -library spw ../../lib/spw/comp/spwcomp.vhd
72 
analyze -f VHDL -library spw ../../lib/spw/wrapper/grspw_gen.vhd
73 
sh mkdir synopsys/eth
74 
define_design_lib eth -path synopsys/eth
75 
analyze -f VHDL -library eth ../../lib/eth/comp/ethcomp.vhd
76 
analyze -f VHDL -library eth ../../lib/eth/core/greth_pkg.vhd
77 
analyze -f VHDL -library eth ../../lib/eth/core/eth_rstgen.vhd
78 
analyze -f VHDL -library eth ../../lib/eth/core/eth_ahb_mst.vhd
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analyze -f VHDL -library eth ../../lib/eth/core/greth_tx.vhd
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analyze -f VHDL -library eth ../../lib/eth/core/greth_rx.vhd
81 
analyze -f VHDL -library eth ../../lib/eth/core/grethc.vhd
82 
analyze -f VHDL -library eth ../../lib/eth/wrapper/greth_gen.vhd
83 
analyze -f VHDL -library eth ../../lib/eth/wrapper/greth_gbit_gen.vhd
84 
sh mkdir synopsys/opencores
85 
define_design_lib opencores -path synopsys/opencores
86 
analyze -f VHDL -library opencores ../../lib/opencores/occomp/occomp.vhd
87 
analyze -f VHDL -library opencores ../../lib/opencores/can/cancomp.vhd
88 
analyze -f VHDL -library opencores ../../lib/opencores/can/can_top.vhd
89 
analyze -f VHDL -library opencores ../../lib/opencores/can/can_top_core_sync.vhd
90 
analyze -f VHDL -library opencores ../../lib/opencores/i2c/i2c_master_bit_ctrl.vhd
91 
analyze -f VHDL -library opencores ../../lib/opencores/i2c/i2c_master_byte_ctrl.vhd
92 
analyze -f VHDL -library opencores ../../lib/opencores/i2c/i2coc.vhd
93 
analyze -f VERILOG -library opencores ../../lib/opencores/spi/simple_spi_top.v
94 
analyze -f VHDL -library opencores ../../lib/opencores/ata/ud_cnt.vhd
95 
analyze -f VHDL -library opencores ../../lib/opencores/ata/ro_cnt.vhd
96 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_dma_fifo.vhd
97 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_dma_actrl.vhd
98 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_dma_tctrl.vhd
99 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_pio_tctrl.vhd
100 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_pio_actrl.vhd
101 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_controller.vhd
102 
analyze -f VHDL -library opencores ../../lib/opencores/ata/atahost_pio_controller.vhd
103 
analyze -f VHDL -library opencores ../../lib/opencores/ata/ocidec2_controller.vhd
104 
analyze -f VERILOG -library opencores ../../lib/opencores/ac97/ac97_top.v
105 
sh mkdir synopsys/gaisler
106 
define_design_lib gaisler -path synopsys/gaisler
107 
analyze -f VHDL -library gaisler ../../lib/gaisler/arith/arith.vhd
108 
analyze -f VHDL -library gaisler ../../lib/gaisler/arith/mul32.vhd
109 
analyze -f VHDL -library gaisler ../../lib/gaisler/arith/div32.vhd
110 
analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/memctrl.vhd
111 
analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/sdctrl.vhd
112 
analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/sdmctrl.vhd
113 
analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/srctrl.vhd
114 
analyze -f VHDL -library gaisler ../../lib/gaisler/memctrl/spimctrl.vhd
115 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3.vhd
116 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/reg_zero.vhd
117 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmuconfig.vhd
118 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmuiface.vhd
119 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libmmu.vhd
120 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libiu.vhd
121 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libcache.vhd
122 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/libproc3.vhd
123 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/cachemem.vhd
124 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_icache.vhd
125 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_dcache.vhd
126 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_acache.vhd
127 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmutlbcam.vhd
128 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmulrue.vhd
129 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmulru.vhd
130 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmutlb.vhd
131 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmutw.vhd
132 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu.vhd
133 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mmu_cache.vhd
134 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/acache.vhd
135 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/dcache.vhd
136 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/icache.vhd
137 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/cache.vhd
138 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/cpu_disasx.vhd
139 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grfpwx.vhd
140 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/mfpwx.vhd
141 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grlfpwx.vhd
142 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/tbufmem.vhd
143 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/dsu3x.vhd
144 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/dsu3.vhd
145 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/proc3.vhd
146 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3s.vhd
147 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3cg.vhd
148 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/irqmp.vhd
149 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grfpwxsh.vhd
150 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/grfpushwx.vhd
151 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/leon3sh.vhd
152 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/my_mux.vhd
153 
analyze -f VHDL -library gaisler ../../lib/gaisler/leon3/top.vhd
154 
analyze -f VHDL -library gaisler ../../lib/gaisler/can/can.vhd
155 
analyze -f VHDL -library gaisler ../../lib/gaisler/can/can_mod.vhd
156 
analyze -f VHDL -library gaisler ../../lib/gaisler/can/can_oc.vhd
157 
analyze -f VHDL -library gaisler ../../lib/gaisler/can/can_mc.vhd
158 
analyze -f VHDL -library gaisler ../../lib/gaisler/can/canmux.vhd
159 
analyze -f VHDL -library gaisler ../../lib/gaisler/can/can_rd.vhd
160 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/misc.vhd
161 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/rstgen.vhd
162 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/gptimer.vhd
163 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbram.vhd
164 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbtrace.vhd
165 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbmst.vhd
166 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/grgpio.vhd
167 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbstat.vhd
168 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/logan.vhd
169 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/apbps2.vhd
170 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/charrom_package.vhd
171 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/charrom.vhd
172 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/apbvga.vhd
173 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/ahbdma.vhd
174 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/svgactrl.vhd
175 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/i2cmst.vhd
176 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/spictrl.vhd
177 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/i2cslv.vhd
178 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/wild.vhd
179 
analyze -f VHDL -library gaisler ../../lib/gaisler/misc/wild2ahb.vhd
180 
analyze -f VHDL -library gaisler ../../lib/gaisler/net/net.vhd
181 
analyze -f VHDL -library gaisler ../../lib/gaisler/uart/uart.vhd
182 
analyze -f VHDL -library gaisler ../../lib/gaisler/uart/libdcom.vhd
183 
analyze -f VHDL -library gaisler ../../lib/gaisler/uart/apbuart.vhd
184 
analyze -f VHDL -library gaisler ../../lib/gaisler/uart/dcom.vhd
185 
analyze -f VHDL -library gaisler ../../lib/gaisler/uart/dcom_uart.vhd
186 
analyze -f VHDL -library gaisler ../../lib/gaisler/uart/ahbuart.vhd
187 
analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/jtag.vhd
188 
analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/libjtagcom.vhd
189 
analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/jtagcom.vhd
190 
analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/ahbjtag.vhd
191 
analyze -f VHDL -library gaisler ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
192 
analyze -f VHDL -library gaisler ../../lib/gaisler/greth/ethernet_mac.vhd
193 
analyze -f VHDL -library gaisler ../../lib/gaisler/greth/greth.vhd
194 
analyze -f VHDL -library gaisler ../../lib/gaisler/greth/greth_gbit.vhd
195 
analyze -f VHDL -library gaisler ../../lib/gaisler/greth/grethm.vhd
196 
analyze -f VHDL -library gaisler ../../lib/gaisler/spacewire/spacewire.vhd
197 
analyze -f VHDL -library gaisler ../../lib/gaisler/spacewire/grspw.vhd
198 
analyze -f VHDL -library gaisler ../../lib/gaisler/spacewire/grspw2.vhd
199 
analyze -f VHDL -library gaisler ../../lib/gaisler/spacewire/grspwm.vhd
200 
analyze -f VHDL -library gaisler ../../lib/gaisler/usb/grusb.vhd
201 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/ata.vhd
202 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/ata_inf.vhd
203 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/atahost_amba_slave.vhd
204 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/atahost_ahbmst.vhd
205 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/ocidec2_amba_slave.vhd
206 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/atactrl_nodma.vhd
207 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/atactrl_dma.vhd
208 
analyze -f VHDL -library gaisler ../../lib/gaisler/ata/atactrl.vhd
209 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/decode_pipe1.v
210 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/EXEC_stage.v
211 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/ulit.v
212 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/ctl_fsm1.v
213 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/RF_stage1.v
214 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/RF_components1.v
215 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/forward.v
216 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/mips789_defs.v
217 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/hazard_unit.v
218 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/forward.v
219 
analyze -f VERILOG -library gaisler ../../lib/gaisler/vlog/core1.v
220 
sh mkdir synopsys/esa
221 
define_design_lib esa -path synopsys/esa
222 
analyze -f VHDL -library esa ../../lib/esa/memoryctrl/memoryctrl.vhd
223 
analyze -f VHDL -library esa ../../lib/esa/memoryctrl/mctrl.vhd
224 
sh mkdir synopsys/micron
225 
define_design_lib micron -path synopsys/micron
226 
sh mkdir synopsys/work
227 
define_design_lib work -path synopsys/work

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