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URL https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk

Subversion Repositories mips_enhanced

[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-gr-xc3s-1500/] [tmp.son] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali
[library]
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name = grlib
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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   []
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  []
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 [file]
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  name = ../../lib/grlib/stdlib/version.vhd
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 [file]
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  name = ../../lib/grlib/stdlib/stdlib.vhd
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 [file]
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  name = ../../lib/grlib/stdlib/stdio.vhd
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 [file]
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  name = ../../lib/grlib/util/util.vhd
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 [file]
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  name = ../../lib/grlib/sparc/sparc.vhd
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 [file]
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  name = ../../lib/grlib/sparc/sparc_disas.vhd
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 [file]
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  name = ../../lib/grlib/sparc/cpu_disas.vhd
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 [file]
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  name = ../../lib/grlib/modgen/multlib.vhd
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 [file]
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  name = ../../lib/grlib/modgen/leaves.vhd
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 [file]
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  name = ../../lib/grlib/amba/amba.vhd
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 [file]
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  name = ../../lib/grlib/amba/devices.vhd
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 [file]
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  name = ../../lib/grlib/amba/defmst.vhd
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 [file]
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  name = ../../lib/grlib/amba/apbctrl.vhd
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 [file]
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  name = ../../lib/grlib/amba/ahbctrl.vhd
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 [file]
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  name = ../../lib/grlib/amba/dma2ahb_pkg.vhd
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 [file]
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  name = ../../lib/grlib/amba/dma2ahb.vhd
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 [file]
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  name = ../../lib/grlib/amba/dma2ahb_tp.vhd
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 []
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[]
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[library]
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name = unisim
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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   []
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  []
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 [file]
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  name = ../../lib/tech/unisim/vcomponents/xilinx_vcomponents.vhd
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 [file]
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  name = ../../lib/tech/unisim/simprims/xilinx_simprims.vhd
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 [file]
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  name = ../../lib/tech/unisim/simprims/xilinx_mem.vhd
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 []
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[]
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[library]
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name = dw02
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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   []
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  []
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 [file]
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  name = ../../lib/tech/dw02/comp/DW02_components.vhd
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 []
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[]
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[library]
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name = synplify
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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   []
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  []
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 [file]
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  name = ../../lib/synplify/sim/synplify.vhd
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 [file]
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  name = ../../lib/synplify/sim/synattr.vhd
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[]
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[library]
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name = techmap
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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 [file]
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  name = ../../lib/techmap/gencomp/gencomp.vhd
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 [file]
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  name = ../../lib/techmap/inferred/mul_inferred.vhd
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  name = ../../lib/techmap/inferred/ddr_phy_inferred.vhd
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  name = ../../lib/techmap/dw02/mul_dw_gen.vhd
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 [file]
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  name = ../../lib/techmap/unisim/memory_unisim.vhd
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  name = ../../lib/techmap/unisim/buffer_unisim.vhd
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  name = ../../lib/techmap/unisim/pads_unisim.vhd
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  name = ../../lib/techmap/unisim/clkgen_unisim.vhd
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  name = ../../lib/techmap/unisim/tap_unisim.vhd
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  name = ../../lib/techmap/unisim/ddr_unisim.vhd
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  name = ../../lib/techmap/unisim/ddr_phy_unisim.vhd
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  name = ../../lib/techmap/unisim/grspwc_unisim.vhd
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  name = ../../lib/techmap/unisim/grfpw_unisim.vhd
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  name = ../../lib/techmap/unisim/grusbhc_unisimpkg.vhd
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  name = ../../lib/techmap/unisim/grusbhc_unisim.vhd
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  name = ../../lib/techmap/unisim/ssrctrl_unisim.vhd
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  name = ../../lib/techmap/maps/allclkgen.vhd
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  name = ../../lib/techmap/maps/allddr.vhd
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  name = ../../lib/techmap/maps/allmem.vhd
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  name = ../../lib/techmap/maps/alltap.vhd
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  name = ../../lib/techmap/maps/clkgen.vhd
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  name = ../../lib/techmap/maps/clkmux.vhd
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  name = ../../lib/techmap/maps/clkand.vhd
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  name = ../../lib/techmap/maps/ddr_ireg.vhd
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  name = ../../lib/techmap/maps/ddr_oreg.vhd
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  name = ../../lib/techmap/maps/ddrphy.vhd
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  name = ../../lib/techmap/maps/syncram.vhd
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  name = ../../lib/techmap/maps/syncram64.vhd
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  name = ../../lib/techmap/maps/syncram_2p.vhd
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  name = ../../lib/techmap/maps/syncram_dp.vhd
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  name = ../../lib/techmap/maps/syncfifo.vhd
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  name = ../../lib/techmap/maps/regfile_3p.vhd
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  name = ../../lib/techmap/maps/tap.vhd
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 [file]
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  name = ../../lib/techmap/maps/techbuf.vhd
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 [file]
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  name = ../../lib/techmap/maps/clkpad.vhd
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  name = ../../lib/techmap/maps/clkpad_ds.vhd
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  name = ../../lib/techmap/maps/inpad.vhd
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  name = ../../lib/techmap/maps/inpad_ds.vhd
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  name = ../../lib/techmap/maps/iodpad.vhd
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  name = ../../lib/techmap/maps/iopad.vhd
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  name = ../../lib/techmap/maps/iopad_ds.vhd
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  name = ../../lib/techmap/maps/lvds_combo.vhd
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  name = ../../lib/techmap/maps/odpad.vhd
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  name = ../../lib/techmap/maps/outpad.vhd
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 [file]
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  name = ../../lib/techmap/maps/outpad_ds.vhd
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 [file]
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  name = ../../lib/techmap/maps/toutpad.vhd
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 [file]
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  name = ../../lib/techmap/maps/skew_outpad.vhd
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 [file]
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  name = ../../lib/techmap/maps/grspwc_net.vhd
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 [file]
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  name = ../../lib/techmap/maps/grlfpw_net.vhd
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  name = ../../lib/techmap/maps/grfpw_net.vhd
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 [file]
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  name = ../../lib/techmap/maps/mul_61x61.vhd
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  name = ../../lib/techmap/maps/cpu_disas_net.vhd
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  name = ../../lib/techmap/maps/grusbhc_net.vhd
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  name = ../../lib/techmap/maps/ringosc.vhd
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  name = ../../lib/techmap/maps/ssrctrl_net.vhd
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[]
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[library]
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name = spw
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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   []
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  []
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 [file]
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  name = ../../lib/spw/comp/spwcomp.vhd
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 []
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 [file]
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  name = ../../lib/spw/wrapper/grspw_gen.vhd
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 []
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[]
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[library]
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name = eth
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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   []
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  []
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 [file]
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  name = ../../lib/eth/comp/ethcomp.vhd
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 []
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  name = ../../lib/eth/core/greth_pkg.vhd
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  name = ../../lib/eth/core/eth_ahb_mst.vhd
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  name = ../../lib/eth/core/greth_rx.vhd
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  name = ../../lib/eth/wrapper/greth_gen.vhd
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 [file]
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  name = ../../lib/eth/wrapper/greth_gbit_gen.vhd
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 []
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[]
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[library]
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name = opencores
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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 [file]
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  name = ../../lib/opencores/occomp/occomp.vhd
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 [file]
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 [file]
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 [file]
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 [file]
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  name = ../../lib/opencores/i2c/i2c_master_byte_ctrl.vhd
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 [file]
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  name = ../../lib/opencores/i2c/i2coc.vhd
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 [file]
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  name = ../../lib/opencores/ata/ud_cnt.vhd
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  name = ../../lib/opencores/ata/ro_cnt.vhd
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  name = ../../lib/opencores/ata/atahost_dma_fifo.vhd
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  name = ../../lib/opencores/ata/atahost_dma_actrl.vhd
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  name = ../../lib/opencores/ata/atahost_dma_tctrl.vhd
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[]
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[library]
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name = gaisler
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  [options]
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   [booloption]
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    name   = -autoorder
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    value  = 0
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    invert = 0
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 [file]
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 []
666
 [file]
667
  name = ../../lib/gaisler/sim/ata_device.vhd
668
 []
669
 [file]
670
  name = ../../lib/gaisler/sim/sram16.vhd
671
 []
672
 [file]
673
  name = ../../lib/gaisler/sim/phy.vhd
674
 []
675
 [file]
676
  name = ../../lib/gaisler/sim/ahbrep.vhd
677
 []
678
 [file]
679
  name = ../../lib/gaisler/jtag/jtag.vhd
680
 []
681
 [file]
682
  name = ../../lib/gaisler/jtag/libjtagcom.vhd
683
 []
684
 [file]
685
  name = ../../lib/gaisler/jtag/jtagcom.vhd
686
 []
687
 [file]
688
  name = ../../lib/gaisler/jtag/ahbjtag.vhd
689
 []
690
 [file]
691
  name = ../../lib/gaisler/jtag/ahbjtag_bsd.vhd
692
 []
693
 [file]
694
  name = ../../lib/gaisler/jtag/jtagtst.vhd
695
 []
696
 [file]
697
  name = ../../lib/gaisler/greth/ethernet_mac.vhd
698
 []
699
 [file]
700
  name = ../../lib/gaisler/greth/greth.vhd
701
 []
702
 [file]
703
  name = ../../lib/gaisler/greth/greth_gbit.vhd
704
 []
705
 [file]
706
  name = ../../lib/gaisler/greth/grethm.vhd
707
 []
708
 [file]
709
  name = ../../lib/gaisler/spacewire/spacewire.vhd
710
 []
711
 [file]
712
  name = ../../lib/gaisler/spacewire/grspw.vhd
713
 []
714
 [file]
715
  name = ../../lib/gaisler/spacewire/grspw2.vhd
716
 []
717
 [file]
718
  name = ../../lib/gaisler/spacewire/grspwm.vhd
719
 []
720
 [file]
721
  name = ../../lib/gaisler/usb/grusb.vhd
722
 []
723
 [file]
724
  name = ../../lib/gaisler/ata/ata.vhd
725
 []
726
 [file]
727
  name = ../../lib/gaisler/ata/ata_inf.vhd
728
 []
729
 [file]
730
  name = ../../lib/gaisler/ata/atahost_amba_slave.vhd
731
 []
732
 [file]
733
  name = ../../lib/gaisler/ata/atahost_ahbmst.vhd
734
 []
735
 [file]
736
  name = ../../lib/gaisler/ata/ocidec2_amba_slave.vhd
737
 []
738
 [file]
739
  name = ../../lib/gaisler/ata/atactrl_nodma.vhd
740
 []
741
 [file]
742
  name = ../../lib/gaisler/ata/atactrl_dma.vhd
743
 []
744
 [file]
745
  name = ../../lib/gaisler/ata/atactrl.vhd
746
 []
747
[]
748
[library]
749
name = esa
750
  [options]
751
   [booloption]
752
    name   = -autoorder
753
    value  = 0
754
    invert = 0
755
   []
756
  []
757
 [file]
758
  name = ../../lib/esa/memoryctrl/memoryctrl.vhd
759
 []
760
 [file]
761
  name = ../../lib/esa/memoryctrl/mctrl.vhd
762
 []
763
[]
764
[library]
765
name = micron
766
  [options]
767
   [booloption]
768
    name   = -autoorder
769
    value  = 0
770
    invert = 0
771
   []
772
  []
773
 [file]
774
  name = ../../lib/micron/sdram/components.vhd
775
 []
776
 [file]
777
  name = ../../lib/micron/sdram/mt48lc16m16a2.vhd
778
 []
779
[]
780
[library]
781
name = sonata
782
toplevel = testbench
783
  [options]
784
   [booloption]
785
    name   = -autoorder
786
    value  = 0
787
    invert = 0
788
   []
789
  []
790
 [file]
791
  name = ../../lib/work/debug/debug.vhd
792
 []
793
 [file]
794
  name = ../../lib/work/debug/grtestmod.vhd
795
 []
796
 [file]
797
  name = ../../lib/work/debug/cpu_disas.vhd
798
 []
799
 [file]
800
  name = config.vhd
801
 []
802
 [file]
803
  name = ahbrom.vhd
804
 []
805
 [file]
806
  name = vga_clkgen.vhd
807
 []
808
 [file]
809
  name = leon3mp.vhd
810
 []
811
 [file]
812
  name = testbench.vhd
813
 []
814
[]

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