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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [designs/] [leon3-xilinx-xc3sd-1800/] [ahbrom.vhd] - Blame information for rev 2

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1 2 dimamali
 
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----------------------------------------------------------------------------
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--  This file is a part of the GRLIB VHDL IP LIBRARY
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--  Copyright (C) 2004 GAISLER RESEARCH
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--
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--  This program is free software; you can redistribute it and/or modify
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--  it under the terms of the GNU General Public License as published by
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--  the Free Software Foundation; either version 2 of the License, or
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--  (at your option) any later version.
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--
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--  See the file COPYING for the full details of the license.
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--
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-----------------------------------------------------------------------------
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-- Entity:      ahbrom
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-- File:        ahbrom.vhd
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-- Author:      Jiri Gaisler - Gaisler Research
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-- Description: AHB rom. 0/1-waitstate read
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------------------------------------------------------------------------------
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library ieee;
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use ieee.std_logic_1164.all;
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library grlib;
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use grlib.amba.all;
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use grlib.stdlib.all;
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use grlib.devices.all;
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entity ahbrom is
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  generic (
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    hindex  : integer := 0;
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    haddr   : integer := 0;
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    hmask   : integer := 16#fff#;
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    pipe    : integer := 0;
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    tech    : integer := 0;
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    kbytes  : integer := 1);
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  port (
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    rst     : in  std_ulogic;
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    clk     : in  std_ulogic;
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    ahbsi   : in  ahb_slv_in_type;
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    ahbso   : out ahb_slv_out_type
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  );
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end;
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architecture rtl of ahbrom is
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constant abits : integer := 17;
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constant bytes : integer := 89996;
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constant hconfig : ahb_config_type := (
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  4 => ahb_membar(haddr, '1', '1', hmask), others => zero32);
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signal romdata : std_logic_vector(31 downto 0);
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signal addr : std_logic_vector(abits-1 downto 2);
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signal hsel, hready : std_ulogic;
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begin
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  ahbso.hresp   <= "00";
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  ahbso.hsplit  <= (others => '0');
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  ahbso.hirq    <= (others => '0');
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  ahbso.hcache  <= '1';
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  ahbso.hconfig <= hconfig;
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  ahbso.hindex  <= hindex;
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  reg : process (clk)
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  begin
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    if rising_edge(clk) then
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      addr <= ahbsi.haddr(abits-1 downto 2);
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    end if;
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  end process;
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  p0 : if pipe = 0 generate
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    ahbso.hrdata  <= romdata;
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    ahbso.hready  <= '1';
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  end generate;
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  p1 : if pipe = 1 generate
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    reg2 : process (clk)
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    begin
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      if rising_edge(clk) then
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        hsel <= ahbsi.hsel(hindex) and ahbsi.htrans(1);
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        hready <= ahbsi.hready;
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        ahbso.hready <=  (not rst) or (hsel and hready) or
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          (ahbsi.hsel(hindex) and not ahbsi.htrans(1) and ahbsi.hready);
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        ahbso.hrdata  <= romdata;
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      end if;
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    end process;
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  end generate;
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  comb : process (addr)
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  begin
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    case conv_integer(addr) is
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    when 16#00000# => romdata <= X"88100000";
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    when 16#00001# => romdata <= X"09100031";
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    when 16#00002# => romdata <= X"81C12314";
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    when 16#00003# => romdata <= X"01000000";
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    when 16#00004# => romdata <= X"A1480000";
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    when 16#00005# => romdata <= X"A7500000";
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    when 16#00006# => romdata <= X"10800836";
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    when others => romdata <= (others => '-');
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    end case;
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  end process;
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  -- pragma translate_off
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  bootmsg : report_version
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  generic map ("ahbrom" & tost(hindex) &
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  ": 32-bit AHB ROM Module,  " & tost(bytes/4) & " words, " & tost(abits-2) & " address bits" );
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  -- pragma translate_on
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  end;

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