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https://opencores.org/ocsvn/mips_enhanced/mips_enhanced/trunk
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Author |
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dimamali |
LEON3 interrupt controller
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CONFIG_IRQ3_ENABLE
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Say Y here to enable the LEON3 interrupt controller. This is needed
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4 |
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if you want to be able to receive interrupts. Operating systems like
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5 |
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Linux, RTEMS and eCos needs this option to be enabled. If you intend
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6 |
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to use the Bare-C run-time and not use interrupts, you could disable
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the interrupt controller and save about 500 gates.
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LEON3 interrupt controller broadcast
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CONFIG_IRQ3_BROADCAST_ENABLE
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11 |
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If enabled the broadcast register is used to determine which
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12 |
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interrupt should be sent to all cpus instead of just the first
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13 |
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one that consumes it.
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15 |
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Secondary interrupts
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16 |
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CONFIG_IRQ3_SEC
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The interrupt controller handles 15 interrupts by default (1 - 15).
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18 |
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These correspond to the 15 SPARC asyncronous traps (0x11 - 0x1F),
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and AMBA interrupts 1 - 15. This option will enable 16 additional
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(secondary) interrupts, corresponding to AMBA interrupts 16 - 31.
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The secondary interrupts will be multiplexed onto one of the first
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15 interrupts. The total number of handled interrupts can then
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be up to 30 (14 primary and 16 secondary).
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25 |
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Number of interrupts
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CONFIG_IRQ3_NSEC
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27 |
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Defines which of the first 15 interrupts should be used for the
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28 |
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secondary (16 - 31) interrupts. Interrupt 15 should be avoided
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29 |
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since it is not maskable by the processor.
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