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[/] [mips_enhanced/] [trunk/] [grlib-gpl-1.0.19-b3188/] [lib/] [gaisler/] [spacewire/] [spacewire.in.help] - Blame information for rev 2

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Line No. Rev Author Line
1 2 dimamali
Spacewire link
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CONFIG_SPW_ENABLE
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  Say Y here to enable one or more Spacewire serial links. The links
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  are based on the GRSPW core from Gaisler Research.
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Number of spacewire links
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CONFIG_SPW_NUM
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  Select the number of links to implement. Each link will be a
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  separate AHB master and APB slave for configuration.
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AHB FIFO depth
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CONFIG_SPW_AHBFIFO4
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  Select the AHB FIFO depth (in 32-bit words).
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RX FIFO depth
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CONFIG_SPW_RXFIFO16
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  Select the receiver FIFO depth (in bytes).
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RMAP protocol
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CONFIG_SPW_RMAP
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  Enable hardware support for the RMAP protocol (draft C).
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RMAP Buffer depth
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CONFIG_SPW_RMAPBUF2
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  Select the size of the RMAP buffer (in bytes).
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RMAP CRC
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CONFIG_SPW_RMAPCRC
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  Enable hardware calculation of the RMAP CRC checksum
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Netlists
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CONFIG_SPW_NETLIST
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  Use the netlist version of GRSPWC. This option is required if
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  you have not licensed the source code of the Spacewire core.
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  Currently only supported for Virtex and Axcelerator FPGAs.
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  The AHB/RX FIFO sizes should be set to 16 word/byte, and the
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  RMAP should be disabled.
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Spacewire FT
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CONFIG_SPW_FT
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  Say Y here to implement the Spacewire block rams with fault-tolerance
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  against SEU errors.
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Spacewire core
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CONFIG_SPW_GRSPW1
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  Select to use GRSPW1 core or GRSPW2 core.

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