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[/] [mkjpeg/] [trunk/] [tb/] [vhdl/] [HostBFM.vhd] - Blame information for rev 53

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1 25 mikel262
-------------------------------------------------------------------------------
2
-- File Name : HostBFM.vhd
3
--
4
-- Project   : JPEG_ENC
5
--
6
-- Module    : HostBFM
7
--
8
-- Content   : Host BFM (Xilinx OPB v2.1)
9
--
10
-- Description : 
11
--
12
-- Spec.     : 
13
--
14
-- Author    : Michal Krepa
15
--
16
-------------------------------------------------------------------------------
17
-- History :
18
-- 20090301: (MK): Initial Creation.
19
-------------------------------------------------------------------------------
20
 
21
library ieee;
22
  use ieee.std_logic_1164.all;
23
  use ieee.numeric_std.all;
24
  use IEEE.STD_LOGIC_TEXTIO.ALL;
25
 
26
library STD;
27
  use STD.TEXTIO.ALL;
28
 
29
library work;
30
  use work.GPL_V2_Image_Pkg.ALL;
31
  use WORK.MDCT_PKG.all;
32
  use WORK.MDCTTB_PKG.all;
33 35 mikel262
  use work.JPEG_PKG.all;
34 25 mikel262
 
35
entity HostBFM is
36
  port
37
  (
38
        CLK                : in  std_logic;
39
        RST                : in  std_logic;
40
        -- OPB
41
        OPB_ABus           : out std_logic_vector(31 downto 0);
42
        OPB_BE             : out std_logic_vector(3 downto 0);
43
        OPB_DBus_in        : out std_logic_vector(31 downto 0);
44
        OPB_RNW            : out std_logic;
45
        OPB_select         : out std_logic;
46
        OPB_DBus_out       : in  std_logic_vector(31 downto 0);
47
        OPB_XferAck        : in  std_logic;
48
        OPB_retry          : in  std_logic;
49
        OPB_toutSup        : in  std_logic;
50
        OPB_errAck         : in  std_logic;
51
 
52
        -- HOST DATA
53 49 mikel262
       iram_wdata          : out std_logic_vector(C_PIXEL_BITS-1 downto 0);
54 25 mikel262
       iram_wren           : out std_logic;
55
       fifo_almost_full    : in  std_logic;
56
 
57
        sim_done           : out std_logic
58
    );
59
end entity HostBFM;
60
 
61
-------------------------------------------------------------------------------
62
-------------------------------------------------------------------------------
63
----------------------------------- ARCHITECTURE ------------------------------
64
-------------------------------------------------------------------------------
65
-------------------------------------------------------------------------------
66
architecture RTL of HostBFM is
67
 
68
  signal num_comps   : integer;
69
  signal addr_inc    : integer := 0;
70
-------------------------------------------------------------------------------
71
-- Architecture: begin
72
-------------------------------------------------------------------------------
73
begin
74
 
75
 
76
 
77
  -------------------------------------------------------------------
78
  -- code
79
  -------------------------------------------------------------------
80
  p_code : process
81
 
82
    -----------------------------------------------------------------
83
    -- HOST WRITE
84
    -----------------------------------------------------------------
85
    procedure host_write
86
      (
87
        signal clk         : in    std_logic;
88
        constant C_ADDR    : in    unsigned(31 downto 0);
89
        constant C_WDATA   : in    unsigned(31 downto 0);
90
 
91
        signal OPB_ABus    : out   std_logic_vector(31 downto 0);
92
        signal OPB_BE      : out   std_logic_vector(3 downto 0);
93
        signal OPB_DBus_in : out   std_logic_vector(31 downto 0);
94
        signal OPB_RNW     : out   std_logic;
95
        signal OPB_select  : out   std_logic;
96
        signal OPB_XferAck : in  std_logic
97
      ) is
98
    begin
99
      OPB_ABus    <= (others => '0');
100
      OPB_BE      <= (others => '0');
101
      OPB_DBus_in <= (others => '0');
102
      OPB_RNW     <= '0';
103
      OPB_select  <= '0';
104
 
105
      wait until rising_edge(clk);
106
 
107
      OPB_select  <= '1';
108
      OPB_ABus    <= std_logic_vector(C_ADDR);
109
      OPB_RNW     <= '0';
110
      OPB_BE      <= X"F";
111
      OPB_DBus_in <= std_logic_vector(C_WDATA);
112
 
113
      wait until rising_edge(clk);
114
 
115
      while OPB_XferAck /= '1' loop
116
        wait until rising_edge(clk);
117
      end loop;
118
 
119
      OPB_ABus    <= (others => '0');
120
      OPB_BE      <= (others => '0');
121
      OPB_DBus_in <= (others => '0');
122
      OPB_RNW     <= '0';
123
      OPB_select  <= '0';
124
 
125
      assert false
126
      report CR&"Host write access, address = " & HexImage(C_ADDR) & ",data written = " & HexImage(C_WDATA) &CR
127
      severity note;
128
 
129
      wait until rising_edge(clk);
130
 
131
    end procedure host_write;
132
 
133
    -----------------------------------------------------------------
134
    -- HOST READ
135
    -----------------------------------------------------------------
136
    procedure host_read
137
      (
138
        signal clk          : in    std_logic;
139
        constant C_ADDR     : in    unsigned(31 downto 0);
140
        variable RDATA      : out   unsigned(31 downto 0);
141
 
142
        signal OPB_ABus     : out   std_logic_vector(31 downto 0);
143
        signal OPB_BE       : out   std_logic_vector(3 downto 0);
144
        signal OPB_DBus_out : in    std_logic_vector(31 downto 0);
145
        signal OPB_RNW      : out   std_logic;
146
        signal OPB_select   : out   std_logic;
147
        signal OPB_XferAck  : in  std_logic
148
      )
149
    is
150
      variable data_r : std_logic_vector(31 downto 0);
151
    begin
152
      OPB_ABus    <= (others => '0');
153
      OPB_BE      <= (others => '0');
154
      OPB_DBus_in <= (others => '0');
155
      OPB_RNW     <= '0';
156
      OPB_select  <= '0';
157
 
158
      wait until rising_edge(clk);
159
 
160
      OPB_select  <= '1';
161
      OPB_ABus    <= std_logic_vector(C_ADDR);
162
      OPB_RNW     <= '1';
163
      OPB_BE      <= X"F";
164
 
165
      wait until rising_edge(clk);
166
 
167
      while OPB_XferAck /= '1' loop
168
        wait until rising_edge(clk);
169
      end loop;
170
 
171
      RDATA := unsigned(OPB_DBus_out);
172
      data_r := OPB_DBus_out;
173
 
174
      OPB_ABus    <= (others => '0');
175
      OPB_BE      <= (others => '0');
176
      OPB_DBus_in <= (others => '0');
177
      OPB_RNW     <= '0';
178
      OPB_select  <= '0';
179
 
180
      assert false
181
      report CR&"Host read access, address = " & HexImage(C_ADDR) & ",data read = " & HexImage(data_r) &CR
182
      severity note;
183
 
184
 
185
      wait until rising_edge(clk);
186
 
187
    end procedure host_read;
188
 
189
 
190
    --------------------------------------
191
    -- read text image data
192
    --------------------------------------
193
    procedure read_image is
194
      file infile          : TEXT open read_mode is "test.txt";
195
      constant N           : integer := 8;
196
      constant MAX_COMPS   : integer := 3;
197
      variable inline      : LINE;
198
      variable tmp_int     : INTEGER := 0;
199
      variable y_size      : INTEGER := 0;
200
      variable x_size      : INTEGER := 0;
201
      variable matrix      : I_MATRIX_TYPE;
202
      variable x_blk_cnt   : INTEGER := 0;
203
      variable y_blk_cnt   : INTEGER := 0;
204
      variable n_lines_arr : N_LINES_TYPE;
205
      variable line_n      : INTEGER := 0;
206
      variable pix_n       : INTEGER := 0;
207
      variable x_n         : INTEGER := 0;
208
      variable y_n         : INTEGER := 0;
209
      variable data_word   : unsigned(31 downto 0);
210
      variable image_line  : STD_LOGIC_VECTOR(0 to MAX_COMPS*MAX_IMAGE_SIZE_X*IP_W-1);
211
 
212
      constant C_IMAGE_RAM_BASE : unsigned(31 downto 0) := X"0010_0000";
213
 
214
      variable x_cnt       : integer;
215
      variable data_word2  : unsigned(31 downto 0);
216
      variable num_comps_v : integer;
217
    begin
218
      READLINE(infile,inline);
219
      READ(inline,num_comps_v);
220
      READLINE(infile,inline);
221
      READ(inline,y_size);
222
      READLINE(infile,inline);
223
      READ(inline,x_size);
224
 
225
      num_comps <= num_comps_v;
226
 
227
      if y_size rem N > 0 then
228
        assert false
229 35 mikel262
          report "ERROR: Image height dimension is not multiply of 8!"
230 25 mikel262
          severity Failure;
231
      end if;
232
      if x_size rem N > 0 then
233
        assert false
234 35 mikel262
          report "ERROR: Image width dimension is not multiply of 8!"
235 25 mikel262
          severity Failure;
236
      end if;
237
 
238 35 mikel262
      if x_size > C_MAX_LINE_WIDTH then
239
        assert false
240
          report "ERROR: Image width bigger than C_MAX_LINE_WIDTH in JPEG_PKG.VHD! " &
241
                 "Increase C_MAX_LINE_WIDTH accordingly"
242
          severity Failure;
243
      end if;
244
 
245 25 mikel262
      addr_inc <= 0;
246
 
247
      -- image size
248
      host_write(CLK, X"0000_0004", to_unsigned(x_size,16) & to_unsigned(y_size,16),
249
               OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
250
 
251
      iram_wren <= '0';
252
      for y_n in 0 to y_size-1 loop
253
        READLINE(infile,inline);
254
        HREAD(inline,image_line(0 to num_comps*x_size*IP_W-1));
255
        x_cnt := 0;
256
        for x_n in 0 to x_size-1 loop
257
          data_word := X"00" & UNSIGNED(image_line(x_cnt to x_cnt+num_comps*IP_W-1));
258 49 mikel262
          if C_PIXEL_BITS = 24 then
259
            data_word2(7 downto 0)   := data_word(23 downto 16);
260
            data_word2(15 downto 8)  := data_word(15 downto 8);
261
            data_word2(23 downto 16) := data_word(7 downto 0);
262
          else
263
            data_word2(4 downto 0)   := data_word(23 downto 19);
264
            data_word2(10 downto 5)  := data_word(15 downto 10);
265
            data_word2(15 downto 11) := data_word(7 downto 3);
266
          end if;
267
 
268 25 mikel262
          iram_wren  <= '0';
269
          iram_wdata <= (others => 'X');
270
          while(fifo_almost_full = '1') loop
271
            wait until rising_edge(clk);
272
          end loop;
273
 
274 52 mikel262
          --for i in 0 to 9 loop
275 25 mikel262
          --  wait until rising_edge(clk);
276
          --end loop;
277
 
278
          iram_wren <= '1';
279 49 mikel262
          iram_wdata <= std_logic_vector(data_word2(C_PIXEL_BITS-1 downto 0));
280 25 mikel262
          wait until rising_edge(clk);
281
 
282
          x_cnt := x_cnt + num_comps*IP_W;
283
 
284
          addr_inc <= addr_inc + 1;
285
        end loop;
286
      end loop;
287
      iram_wren <= '0';
288
 
289
    end read_image;
290
 
291
    ------------------
292
    type ROMQ_TYPE is array (0 to 64-1)
293
            of unsigned(7 downto 0);
294
 
295 32 mikel262
  constant qrom_lum : ROMQ_TYPE :=
296 25 mikel262
  (
297
  -- 100%
298
  --others => X"01"
299
 
300
  -- 85%
301 41 mikel262
  --X"05", X"03", X"04", X"04", 
302
  --X"04", X"03", X"05", X"04", 
303
  --X"04", X"04", X"05", X"05", 
304
  --X"05", X"06", X"07", X"0C",
305
  --X"08", X"07", X"07", X"07", 
306
  --X"07", X"0F", X"0B", X"0B", 
307
  --X"09", X"0C", X"11", X"0F", 
308
  --X"12", X"12", X"11", X"0F",
309
  --X"11", X"11", X"13", X"16", 
310
  --X"1C", X"17", X"13", X"14", 
311
  --X"1A", X"15", X"11", X"11", 
312
  --X"18", X"21", X"18", X"1A",
313
  --X"1D", X"1D", X"1F", X"1F", 
314
  --X"1F", X"13", X"17", X"22", 
315
  --X"24", X"22", X"1E", X"24", 
316
  --X"1C", X"1E", X"1F", X"1E"
317
 -- others => X"01"
318 25 mikel262
 
319
  -- 75%
320 53 mikel262
   --X"08", X"06", X"06", X"07", X"06", X"05", X"08", X"07", X"07", X"07", X"09", X"09", X"08", X"0A", X"0C", X"14",
321
   --X"0D", X"0C", X"0B", X"0B", X"0C", X"19", X"12", X"13", X"0F", X"14", X"1D", X"1A", X"1F", X"1E", X"1D", X"1A",
322
   --X"1C", X"1C", X"20", X"24", X"2E", X"27", X"20", X"22", X"2C", X"23", X"1C", X"1C", X"28", X"37", X"29", X"2C",
323
   --X"30", X"31", X"34", X"34", X"34", X"1F", X"27", X"39", X"3D", X"38", X"32", X"3C", X"2E", X"33", X"34", X"32"
324 25 mikel262
 
325
   -- 15 %
326
   --X"35", X"25", X"28", X"2F", 
327
   --X"28", X"21", X"35", X"2F", 
328
   --X"2B", X"2F", X"3C", X"39", 
329
   --X"35", X"3F", X"50", X"85", 
330
   --X"57", X"50", X"49", X"49", 
331
   --X"50", X"A3", X"75", X"7B", 
332
   --X"61", X"85", X"C1", X"AA", 
333
   --X"CB", X"C8", X"BE", X"AA", 
334
   --X"BA", X"B7", X"D5", X"F0", 
335
   --X"FF", X"FF", X"D5", X"E2", 
336
   --X"FF", X"E6", X"B7", X"BA", 
337
   --X"FF", X"FF", X"FF", X"FF", 
338
   --X"FF", X"FF", X"FF", X"FF", 
339
   --X"FF", X"CE", X"FF", X"FF", 
340
   --X"FF", X"FF", X"FF", X"FF", 
341 32 mikel262
   --X"FF", X"FF", X"FF", X"FF"      
342 25 mikel262
 
343
   -- 50%
344 53 mikel262
   X"10", X"0B", X"0C", X"0E", X"0C", X"0A", X"10", X"0E",
345
   X"0D", X"0E", X"12", X"11", X"10", X"13", X"18", X"28",
346
   X"1A", X"18", X"16", X"16", X"18", X"31", X"23", X"25",
347
   X"1D", X"28", X"3A", X"33", X"3D", X"3C", X"39", X"33",
348
   X"38", X"37", X"40", X"48", X"5C", X"4E", X"40", X"44",
349
   X"57", X"45", X"37", X"38", X"50", X"6D", X"51", X"57",
350
   X"5F", X"62", X"67", X"68", X"67", X"3E", X"4D", X"71",
351
   X"79", X"70", X"64", X"78", X"5C", X"65", X"67", X"63"
352 32 mikel262
  );
353
 
354
  constant qrom_chr : ROMQ_TYPE :=
355
  (
356 36 mikel262
   -- 50% for chrominance
357 53 mikel262
  X"11", X"12", X"12", X"18", X"15", X"18", X"2F", X"1A",
358
  X"1A", X"2F", X"63", X"42", X"38", X"42", X"63", X"63",
359
  X"63", X"63", X"63", X"63", X"63", X"63", X"63", X"63",
360
  X"63", X"63", X"63", X"63", X"63", X"63", X"63", X"63",
361
  X"63", X"63", X"63", X"63", X"63", X"63", X"63", X"63",
362
  X"63", X"63", X"63", X"63", X"63", X"63", X"63", X"63",
363
  X"63", X"63", X"63", X"63", X"63", X"63", X"63", X"63",
364
  X"63", X"63", X"63", X"63", X"63", X"63", X"63", X"63"
365 38 mikel262
 
366 41 mikel262
  -- 75% chrominance
367 53 mikel262
  --X"09", X"09", X"09", X"0C", X"0B", X"0C", X"18", X"0D", 
368
  --X"0D", X"18", X"32", X"21", X"1C", X"21", X"32", X"32", 
369
  --X"32", X"32", X"32", X"32", X"32", X"32", X"32", X"32", 
370
  --X"32", X"32", X"32", X"32", X"32", X"32", X"32", X"32", 
371
  --X"32", X"32", X"32", X"32", X"32", X"32", X"32", X"32", 
372
  --X"32", X"32", X"32", X"32", X"32", X"32", X"32", X"32", 
373
  --X"32", X"32", X"32", X"32", X"32", X"32", X"32", X"32", 
374
  --X"32", X"32", X"32", X"32", X"32", X"32", X"32", X"32"
375 41 mikel262
 
376
  --X"08", X"06", X"06", X"07", X"06", X"05", X"08", X"07", X"07", X"07", X"09", X"09", X"08", X"0A", X"0C", X"14",
377
  --X"0D", X"0C", X"0B", X"0B", X"0C", X"19", X"12", X"13", X"0F", X"14", X"1D", X"1A", X"1F", X"1E", X"1D", X"1A",
378
  --X"1C", X"1C", X"20", X"24", X"2E", X"27", X"20", X"22", X"2C", X"23", X"1C", X"1C", X"28", X"37", X"29", X"2C",
379
  --X"30", X"31", X"34", X"34", X"34", X"1F", X"27", X"39", X"3D", X"38", X"32", X"3C", X"2E", X"33", X"34", X"32"
380
  -- others => X"01"
381 25 mikel262
  );
382
 
383
    variable data_read  : unsigned(31 downto 0);
384
    variable data_write : unsigned(31 downto 0);
385
    variable addr       : unsigned(31 downto 0);
386
 
387
 
388
  ------------------------------------------------------------------------------
389
  -- BEGIN
390
  ------------------------------------------------------------------------------
391
  begin
392
    sim_done <= '0';
393
    iram_wren <= '0';
394
 
395
    while RST /= '0' loop
396
      wait until rising_edge(clk);
397
    end loop;
398
 
399
    for i in 0 to 100 loop
400
      wait until rising_edge(clk);
401
    end loop;
402
 
403
 
404
 
405
    host_read(CLK, X"0000_0000", data_read,
406
               OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
407
 
408
 
409
    host_read(CLK, X"0000_0004", data_read,
410
               OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
411
 
412 32 mikel262
    -- write luminance quantization table 
413 25 mikel262
    for i in 0 to 64-1 loop
414 32 mikel262
      data_write := X"0000_00" & qrom_lum(i);
415 25 mikel262
      addr := X"0000_0100" + to_unsigned(4*i,32);
416
      host_write(CLK, addr, data_write,
417
               OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
418
 
419
    end loop;
420
 
421 32 mikel262
    -- write chrominance quantization table 
422
    for i in 0 to 64-1 loop
423
      data_write := X"0000_00" & qrom_chr(i);
424
      addr := X"0000_0200" + to_unsigned(4*i,32);
425
      host_write(CLK, addr, data_write,
426
               OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
427
 
428
    end loop;
429
 
430
 
431 25 mikel262
 
432
    data_write := to_unsigned(1,32) + shift_left(to_unsigned(3,32),1);
433
 
434
    -- SOF & num_comps
435
    host_write(CLK, X"0000_0000", data_write,
436
               OPB_ABus, OPB_BE, OPB_DBus_in, OPB_RNW, OPB_select, OPB_XferAck);
437
 
438
    -- write BUF_FIFO with bitmap
439
    read_image;
440
 
441
    -- wait until JPEG encoding is done
442
    host_read(CLK, X"0000_000C", data_read,
443
               OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
444
    while data_read /= 2 loop
445
     host_read(CLK, X"0000_000C", data_read,
446
               OPB_ABus, OPB_BE, OPB_DBus_out, OPB_RNW, OPB_select, OPB_XferAck);
447
    end loop;
448
 
449
    sim_done <= '1';
450
 
451
    wait;
452
 
453
  end process;
454
 
455
 
456
end architecture RTL;
457
-------------------------------------------------------------------------------
458
-- Architecture: end
459
-------------------------------------------------------------------------------

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