OpenCores
URL https://opencores.org/ocsvn/mod_mult_exp/mod_mult_exp/trunk

Subversion Repositories mod_mult_exp

[/] [mod_mult_exp/] [trunk/] [rtl/] [vhdl/] [mod_exp/] [blockMemory32/] [blockMemory/] [simulation/] [functional/] [wave_ncsim.sv] - Blame information for rev 5

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 gajos 
 
2 
 
3 
 
4 
 
5 
 
6 
 
7 
 
8 
 
9 
 
10 
window new WaveWindow  -name  "Waves for BMG Example Design"
11 
waveform  using  "Waves for BMG Example Design"
12 
 
13 
      waveform add -signals /blockMemory_tb/status
14 
      waveform add -signals /blockMemory_tb/blockMemory_synth_inst/bmg_port/RSTA
15 
      waveform add -signals /blockMemory_tb/blockMemory_synth_inst/bmg_port/CLKA
16 
      waveform add -signals /blockMemory_tb/blockMemory_synth_inst/bmg_port/ADDRA
17 
      waveform add -signals /blockMemory_tb/blockMemory_synth_inst/bmg_port/DINA
18 
      waveform add -signals /blockMemory_tb/blockMemory_synth_inst/bmg_port/WEA
19 
      waveform add -signals /blockMemory_tb/blockMemory_synth_inst/bmg_port/DOUTA
20 
 
21 
console submit -using simulator -wait no "run"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.