This folder contains the the core VHDL files for the NEORV32 CPU and the NEORV32 Processor. When creating a new synthesis/simulation project make
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sure that all `*.vhd` files from this folder are added to a **new** design library called `neorv32`.
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### `fpga_specifc`
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This folder provides FPGA- or technology-specific *alternatives* for certain CPU and/or processor modules (for example optimized memory modules using
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FPGA-specific primitves).
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### `top_templates`
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Alternative top entities for the CPU and/or the processor. Actually, these *alternative* top entities are wrappers, which instantiate the *real* top entity of
