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// #################################################################################################
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// # << NEORV32 - CFU Custom Instructions Example Program >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file demo_cfu/main.c
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* @author Stephan Nolting
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* @brief Example program showing how to use the CFU's custom instructions.
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**************************************************************************/
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#include <neorv32.h>
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/**********************************************************************//**
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* @name User configuration
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**************************************************************************/
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/**@{*/
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/** UART BAUD rate */
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#define BAUD_RATE 19200
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/** Number of test cases per CFU instruction */
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#define TESTCASES 4
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/**@}*/
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/**********************************************************************//**
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* @name Prototypes
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**************************************************************************/
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uint32_t xorshift32(void);
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/**********************************************************************//**
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* Main function
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*
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* @note This program requires the CFU and UART0.
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*
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* @return 0 if execution was successful
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**************************************************************************/
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int main() {
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// initialize NEORV32 run-time environment
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neorv32_rte_setup();
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// setup UART0 at default baud rate, no parity bits, no HW flow control
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neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
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// check if UART0 is implemented
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if (neorv32_uart0_available() == 0) {
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return 1; // UART0 not available, exit
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}
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// check if the CFU is implemented at all
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// note that the CFU is wrapped in the core's "Zxcfu" ISA extension
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if (neorv32_cpu_cfu_available() == 0) {
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neorv32_uart0_printf("ERROR! CFU ('Zxcfu' ISA extensions) not implemented!\n");
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return 1;
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}
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// intro
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neorv32_uart0_printf("\n<<< NEORV32 Custom Functions Unit (CFU) 'Custom Instructions' Example Program >>>\n\n");
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neorv32_uart0_printf("NOTE: This program assumes the _default_ CFU hardware module, which implements\n"
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" four simple data conversion instructions.\n\n");
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neorv32_uart0_printf("NOTE: This program (and it's comments) just shows how to USE the CFU's custom\n"
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" instructions. The actual implementation of these instructions is done\n"
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" in the CFU hardware module (-> rtl/core/neorv32_cpu_cp_cfu.vhd).\n\n");
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// custom instructions usage examples
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uint32_t i, opa, opb;
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neorv32_uart0_printf("\n--- CFU 'binary to gray' instruction (funct3 = 000) ---\n");
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for (i=0; i<TESTCASES; i++) {
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opa = xorshift32(); // get random test data
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opb = 0;
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neorv32_uart0_printf("%u: neorv32_cfu_cmd0 - OPA = 0x%x, OPB = 0x%x, ", i, opa, opb);
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// The CFU custom instruction can be used as plain C functions!
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//
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// There are 8 "prototypes" for the CFU instructions:
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// - neorv32_cfu_cmd0(funct7, rs1, rs2) - sets the instruction's "funct3" bit field to 000
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// - neorv32_cfu_cmd1(funct7, rs1, rs2) - sets the instruction's "funct3" bit field to 001
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// - ...
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// - neorv32_cfu_cmd7(funct7, rs1, rs2) - sets the instruction's "funct3" bit field to 111
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//
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// These functions are turned into 32-bit instruction words resembling a R2-type RISC-V instruction
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// (=> "intrinsics").
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//
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// Each neorv32_cfu_cmd* function requires three arguments:
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// - funct7: a compile-time static 7-bit immediate (put in the instruction's "funct7" bit field)
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// - rs1: a 32-bit operand A (this is the first register file source rs1)
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// - rs2: a 32-bit operand B (this is the first register second source rs2)
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//
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// The operands can be literals, variables, function return values, ... you name it.
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//
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// Each neorv32_cfu_cmd* function returns a 32-bit uint32_t data word, which represents
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// the result of the according instruction.
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//
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// The 7-bit immediate ("funct7") can be used to pass small _static_ literals to the CFU
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// or to do a more fine-grained function selection - it all depends on your hardware implementation! ;)
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neorv32_uart0_printf("Result = 0x%x\n", neorv32_cfu_cmd0(0b0000000, opa, opb));
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}
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neorv32_uart0_printf("\n--- CFU 'gray to binary' instruction (funct3 = 001) ---\n");
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for (i=0; i<TESTCASES; i++) {
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opa = xorshift32();
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neorv32_uart0_printf("%u: neorv32_cfu_cmd1 - OPA = 0x%x, OPB = 0x%x, ", i, opa, 0);
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// you can also pass literals instead of variables to the intrinsics (0 instead of opb):
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neorv32_uart0_printf("Result = 0x%x\n", neorv32_cfu_cmd1(0b0000000, opa, 0));
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}
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neorv32_uart0_printf("\n--- CFU 'bit reversal' instruction (funct3 = 010) ---\n");
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for (i=0; i<TESTCASES; i++) {
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opa = xorshift32();
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neorv32_uart0_printf("%u: neorv32_cfu_cmd2 - OPA = 0x%x, OPB = 0x%x, ", i, opa, 0);
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// here we are setting the funct7 bit-field to all-one; however, this is not
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// used at all by the default CFU hardware module
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// note that all funct3/funct7 combinations are treated as "valid" by the CPU
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// - so there is no chance of causing an illegal instruction exception by using the CFU intrinsics
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neorv32_uart0_printf("Result = 0x%x\n", neorv32_cfu_cmd2(0b1111111, opa, 0));
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}
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neorv32_uart0_printf("\n--- CFU 'XNOR' instruction (funct3 = 011) ---\n");
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for (i=0; i<TESTCASES; i++) {
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opa = xorshift32();
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opb = xorshift32();
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neorv32_uart0_printf("%u: neorv32_cfu_cmd3 - OPA = 0x%x, OPB = 0x%x, ", i, opa, opb);
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neorv32_uart0_printf("Result = 0x%x\n", neorv32_cfu_cmd3(0b0000000, opa, opb));
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}
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neorv32_uart0_printf("\nCFU demo program completed.\n");
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return 0;
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}
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/**********************************************************************//**
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* Pseudo-random number generator (to generate deterministic test data).
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*
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* @return Random data (32-bit).
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**************************************************************************/
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uint32_t xorshift32(void) {
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static uint32_t x32 = 314159265;
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x32 ^= x32 << 13;
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x32 ^= x32 >> 17;
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x32 ^= x32 << 5;
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return x32;
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}
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