OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_twi.c] - Blame information for rev 23

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 zero_gravi
// #################################################################################################
2 10 zero_gravi
// # << NEORV32: neorv32_twi.c - Two-Wire Interface Controller (TWI) HW Driver >>                  #
3 2 zero_gravi
// # ********************************************************************************************* #
4
// # BSD 3-Clause License                                                                          #
5
// #                                                                                               #
6
// # Copyright (c) 2020, Stephan Nolting. All rights reserved.                                     #
7
// #                                                                                               #
8
// # Redistribution and use in source and binary forms, with or without modification, are          #
9
// # permitted provided that the following conditions are met:                                     #
10
// #                                                                                               #
11
// # 1. Redistributions of source code must retain the above copyright notice, this list of        #
12
// #    conditions and the following disclaimer.                                                   #
13
// #                                                                                               #
14
// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of     #
15
// #    conditions and the following disclaimer in the documentation and/or other materials        #
16
// #    provided with the distribution.                                                            #
17
// #                                                                                               #
18
// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to  #
19
// #    endorse or promote products derived from this software without specific prior written      #
20
// #    permission.                                                                                #
21
// #                                                                                               #
22
// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS   #
23
// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF               #
24
// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE    #
25
// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,     #
26
// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
27
// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED    #
28
// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING     #
29
// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED  #
30
// # OF THE POSSIBILITY OF SUCH DAMAGE.                                                            #
31
// # ********************************************************************************************* #
32
// # The NEORV32 Processor - https://github.com/stnolting/neorv32              (c) Stephan Nolting #
33
// #################################################################################################
34
 
35
 
36
/**********************************************************************//**
37
 * @file neorv32_twi.c
38
 * @author Stephan Nolting
39 10 zero_gravi
 * @brief Two-Wire Interface Controller (TWI) HW driver source file.
40 2 zero_gravi
 *
41
 * @note These functions should only be used if the TWI unit was synthesized (IO_TWI_USE = true).
42
 **************************************************************************/
43
 
44
#include "neorv32.h"
45
#include "neorv32_twi.h"
46
 
47
 
48
/**********************************************************************//**
49
 * Check if TWI unit was synthesized.
50
 *
51
 * @return 0 if TWI was not synthesized, 1 if TWI is available.
52
 **************************************************************************/
53
int neorv32_twi_available(void) {
54
 
55 12 zero_gravi
  if (SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_IO_TWI)) {
56 2 zero_gravi
    return 1;
57
  }
58
  else {
59
    return 0;
60
  }
61
}
62
 
63
 
64
/**********************************************************************//**
65
 * Enable and configure TWI controller. The TWI control register bits are listed in #NEORV32_TWI_CT_enum.
66
 *
67
 * @param[in] prsc Clock prescaler select (0..7). See #NEORV32_CLOCK_PRSC_enum.
68
 * @param[in] irq_en Enable transfer-done interrupt when 1.
69
 **************************************************************************/
70
void neorv32_twi_setup(uint8_t prsc, uint8_t irq_en) {
71
 
72
  TWI_CT = 0; // reset
73
 
74
  uint32_t ct_enable = 1;
75
  ct_enable = ct_enable << TWI_CT_EN;
76
 
77
  uint32_t ct_prsc = (uint32_t)(prsc & 0x07);
78
  ct_prsc = ct_prsc << TWI_CT_PRSC0;
79
 
80
  uint32_t ct_irq = (uint32_t)(irq_en & 0x01);
81
  ct_irq = ct_irq << TWI_CT_IRQ_EN;
82
 
83
  TWI_CT = ct_enable | ct_prsc | ct_irq;
84
}
85
 
86
 
87
/**********************************************************************//**
88
 * Disable TWI controller.
89
 **************************************************************************/
90
void neorv32_twi_disable(void) {
91
 
92
  TWI_CT &= ~((uint32_t)(1 << TWI_CT_IRQ_EN));
93
}
94
 
95
 
96
/**********************************************************************//**
97 10 zero_gravi
 * Activate sending ACKs by controller (MACK).
98 2 zero_gravi
 **************************************************************************/
99
void neorv32_twi_mack_enable(void) {
100
 
101
  TWI_CT |= ((uint32_t)(1 << TWI_CT_MACK));
102
}
103
 
104
 
105
/**********************************************************************//**
106 10 zero_gravi
 * Deacivate sending ACKs by controller (MACK).
107 2 zero_gravi
 **************************************************************************/
108
void neorv32_twi_mack_disable(void) {
109
 
110
  TWI_CT &= ~((uint32_t)(1 << TWI_CT_MACK));
111
}
112
 
113
 
114 23 zero_gravi
/**********************************************************************//**
115
 * Check if TWI is busy.
116
 *
117
 * @note This function is blocking.
118
 *
119
 * @return 0 if idle, 1 if busy
120
 **************************************************************************/
121
int neorv32_twi_busy(void) {
122
 
123
  if (TWI_CT & (1 << TWI_CT_BUSY)) {
124
    return 1;
125
  }
126
  return 0;
127
}
128
 
129
 
130 2 zero_gravi
 /**********************************************************************//**
131
 * Generate START condition and send first byte (address including R/W bit).
132
 *
133
 * @note Blocking function.
134
 *
135
 * @param[in] a Data byte including 7-bit address and R/W-bit (lsb).
136
 * @return 0: ACK received, 1: NACK received.
137
 **************************************************************************/
138
int neorv32_twi_start_trans(uint8_t a) {
139
 
140
  neorv32_twi_generate_start(); // generate START condition
141
 
142
  TWI_DATA = (uint32_t)a; // send address
143
  while(TWI_CT & (1 << TWI_CT_BUSY)); // wait until idle again
144
 
145
  // check for ACK/NACK
146
  if (TWI_CT & (1 << TWI_CT_ACK))
147
    return 0; // ACK received
148
  else
149
    return 1; // NACK received
150
}
151
 
152
 
153
 /**********************************************************************//**
154
 * Send data byte and also receive data byte (can be read via neorv32_twi_get_data()).
155
 *
156
 * @note Blocking function.
157
 *
158
 * @param[in] d Data byte to be send.
159
 * @return 0: ACK received, 1: NACK received.
160
 **************************************************************************/
161
int neorv32_twi_trans(uint8_t d) {
162
 
163
  TWI_DATA = (uint32_t)d; // send data
164
  while(TWI_CT & (1 << TWI_CT_BUSY)); // wait until idle again
165
 
166
  // check for ACK/NACK
167
  if (TWI_CT & (1 << TWI_CT_ACK))
168
    return 0; // ACK received
169
  else
170
    return 1; // NACK received
171
}
172
 
173
 
174
 /**********************************************************************//**
175
 * Get received data from last transmission.
176
 *
177
 * @return 0: Last received data byte.
178
 **************************************************************************/
179
uint8_t neorv32_twi_get_data(void) {
180
 
181
  return (uint8_t)TWI_DATA; // get RX data from previous transmission
182
}
183
 
184
 
185
 /**********************************************************************//**
186
 * Generate STOP condition.
187
 *
188
 * @note Blocking function.
189
 **************************************************************************/
190
void neorv32_twi_generate_stop(void) {
191
 
192
  TWI_CT |= (uint32_t)(1 << TWI_CT_STOP); // generate STOP condition
193
  while(TWI_CT & (1 << TWI_CT_BUSY)); // wait until idle again
194
}
195
 
196
 
197
 /**********************************************************************//**
198
 * Generate START condition.
199
 *
200
 * @note Blocking function.
201
 **************************************************************************/
202
void neorv32_twi_generate_start(void) {
203
 
204
  TWI_CT |= (1 << TWI_CT_START); // generate START condition
205
  while(TWI_CT & (1 << TWI_CT_BUSY)); // wait until idle again
206
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.